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Tesla Clock Distribution Engineer United States, California, Palo Alto 309113579
06.04.2025
What to Expect What You’ll Do What You’ll Bring
The Dojo Hardware team is looking for a Clock Distribution Engineer to work in Palo Alto, CA. This Engineer will be responsible for the design and implementation of clocks at both the SOC and IP level.
- Design custom clock distribution from PLL to sub-blocks meeting low latency and jitter specs for various SOC clocks
- Write modular clock RTL to handle changes, integrating it into design
- Strong tcl knowledge to automate the clock tree generation based on bottoms-up load feedback.
- Work with block designers for CTS spec and any global clock changes to help interface timing.
- Work with RTL owners, DFX team to understand additional logic that can intrude in clock path
- Knowledge of CDC, async FIFOs, synchronization methodologies a plus
- Engineering degree in a relevant field, or equivalent experience
- Must have implemented high speed low jitter custom clock distribution such as mesh and recombinant trees
- Proficient in using industry-standard EDA tools
- Knowledge of going through the entire design flow from clock extraction, spice simulation and timing annotation
- Proficient with System Verilog
- Knowledge of Spyglass CDC is a plus
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