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Intel Experienced Verification Design Engineer 
Israel, Haifa District, Haifa 
308424192

25.03.2025

Qualifications

A B.Sc. or M.Sc. degree in Electrical Engineering, Computer Engineering, Software Engineering or Computer Science.At least 5 years of overall experience performing RTL Verification and/or logic design using System Verilog.Knowledge in Very Large-Scale Integration (VLSI) design and/or verificationExperience in developing validation collaterals in emulation environment - Advantage.Experience in developing Register Transfer Level (RTL) validation environment -- Advantage.Experience in working with Verilog/SVTB/OVM/UVM and Specman -- Advantage.Experience with Formal Verification CPU usage.Familiarity with CPU X86 architecture.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits