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Apple SoC Memory Cache Controller Engineer United States, California 283656190
01.08.2024
Minimum Qualifications
- BS and a minimum of 20 years relevant industry experience
Preferred Qualifications
- Development of memory systems.
- Experience in RTL/micro-architecture definition.
- Experience in PPA (performance/power/area) analysis.
- Knowledge of dedication coherent memory system or interconnect architectures.
- Strong cache design background including good understanding of different memory organizations and tradeoffs.
- Knowledge of dedication memory subsystem and dram controller.
- Hands on Experience with multi-processor cache coherence protocols
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $252,400 and $378,700, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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