Master's degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or related field and 5 years of experience in the job offered or related occupation.
5 years of experience with each of the following skills is required:
Utilizing EDA (Electronic Design Automation) tools such as Innovus or ICCompiler, semiconductor technologies for P&R flows to produce an integrated circuit layout
Utilizing IC validator for Physical Design Verification
Utilizing Circuit design techniques such as clock gating and power gating to reduce power for optimizing and driving Circuit design to determine the appropriate sizes of transistors within the layout
Perl, Shell scripting, Makefiles or TCL for design and verification
Utilizing Pin assignment, macro placement or routing analysis to meet design specifications and address challenges such as routing congestion and optimizing wirelength
Clock gating, power gating, or voltage scaling
Wirelength optimization methods for Power Analysis and Optimization
Experience with techniques to reduce dynamic power