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Apple RFIC - PLL Design Engineer United States, California, Irvine 241312902
07.04.2025
As an RFIC-PLL Designer, you will provide analog and digital PLL solutions for wireless SoC and drive them to mass production for Apple’s Wireless Connectivity products. Responsibilities include: - Lead design of radio transceiver chains including analog PLLs - VCOs, digital PLLs - DCOs, LOGen, and chain of blocks in RX and TX.- Drive radio KPI (power, area, performance) to meet product requirements. Work with multi-functional teams, including platform architecture, wireless design, RF HW, and SW, to define radio features enabling wireless innovation. - Work closely with RF Systems on block-level and high-level specifications of the PLL-LOGen, TX and RX line-ups and the accurate distribution of spec margins in the chain.- Hands-on design contributions, from concept, architecture, and topology to transistor-level feasibility studies and KPI trade-off analysis to actual design, simulations, and extractions.- Responsible for the floorplan layout and verification of the design to ensure a successful tape-out and work through Co-Existence scenarios and design to meet the CoEx requirements.- Provide design versus silicon measurements correlation and compliance with volume production specifications.
- BS and 3 + years of relevant industry experience.
- Experience with RF/analog and mixed-signal design experience in groundbreaking RF CMOS design.
- Experienced in the design and development of fractional N Synthesizers, Digital PLLs, Analog PLLs, and LO-Gen for high-performance applications and also low power applications.
- Hands-on experience designing TDC, GRO, Digital Filters, Sigma Delta Modulators, Pre-scalers, MMD, DCOs, PFD-CP, and VCOs. Modeling, analysis, and design of SD noise cancellation and spur cancellation techniques.
- Skilled in using Cadence Virtuoso, Spectre RF, Matlab, and EM simulation tools (e.g., EMX, HFSS).
- Familiarity with mixed-signal verification methodologies (SystemVerilog, AMS, Nanotime).
- Direct experience in designing and bringing wireless transceivers into mass production in deep sub-micron RFCMOS technology.
- Extensive knowledge in fractional N synthesizer and LOGen silicon characterization and debugging.
- Deep understanding of analog, mixed-signal, and RF circuit design. This includes LNAs, PAs, mixers, baseband filters, VGAs, and calibration methods associated with high-performance wireless systems.
- Familiarity with various RF transceiver architectures and their trade-offs and system specifications, and ability to work with system architects to translate system requirements into circuit requirements at the IC level.
- MSEE and/or PhD with extensive experience.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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