Cisco Physical Design Manager 

Armenia, Yerevan 

233142969

• Lead a team responsible for the physical implementation and sign-off of high-complexity blocks, driving all aspects from RTL to GDS.
• Collaborate closely with multiple functional teams to ensure seamless operations and enable the effective implementation of blocks.
• Lead all aspects of the entire physical design process, ensuring that designs meet performance, area, and power requirements.
• Ensure smooth handoffs between the top-level implementation team, meeting all criteria within the established timelines.
• Provide technical leadership and mentorship to team members, ensuring they have the support and resources needed for success.

• BS or MS in Electrical Engineering, Computer Science, or a related field.
• 8+ years of experience in ASIC design and verification.
• Strong experience with deep submicron CMOS technologies.
• Extensive knowledge of the full design cycle from RTL to GDSII.
• Strong understanding of Static Timing Analysis, timing closure, and design constraints.
• Expertise in block-level synthesis, place and route, and timing closure.
• Familiarity with industry-standard PnR and sign-off tools.

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