Intel CPU Physical Design Engineer 

United States, Texas 

227881401

Responsibilities include, although not limited to:

• Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.

• Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power-clock distribution, reliability, and power and noise analysis.

• Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to improve current and future microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.

• Possesses specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.

• Participates in leading the physical design automation and flows to improve performance power, design quality and cost

• Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.

• Optimizes design to improve product level parameters such as power, frequency, and area.

We are looking for candidate who are:

• Excellent problem-solving skills and the ability to work effectively in a collaborative team environment.

• Strong communication skills, both written and verbal, with the ability to convey complex technical concepts to cross-functional teams.

• Self-starter and self-driven, with the ability to proactively identify improvement methods and solve issues.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship

Minimum Qualifications:

• Master’s degree in Electrical Engineering or Computer Science or related field with 3+ years of related technical experience-OR-

• PhD in Electrical Engineering or Computer Science or related field with 1+ year of related technical experience

Technical Experience in:

• Experience in SoC design flow including RTL design, synthesis, place and route, timing analysis, and power optimization

• Experience in Physical design methodology and the flow automation

• Experience with benchmarking and validation methods to compare process PPA entitlement.

• Expertise in scripting languages like Python, TCL, Perl

Preferred Qualifications:

• Knowledge with circuit, memory and/or standard cell design

• Exposure to 3DIC compiler, multi-die design tools

• Knowledge in Data Analysis Tools e.g., JMP, R, Python.

Experienced HireShift 1 (United States of America)US, Oregon, HillsboroUS, California, Santa Clara, US, Texas, Austin
Position of Trust

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US: