המקום בו המומחים והחברות הטובות ביותר נפגשים
Facebook ASIC Engineer Design Verification United States, California, Sunnyvale 227809885
30.03.2025
Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.
ASIC Engineer, Design Verification Responsibilities
- Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification.
- Develop functional tests based on verification test plan.
- Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage.
- Debug, root-cause and resolve functional failures in the design, partnering with the Design team.
- Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality.
- Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry.
Minimum Qualifications
- Track record of 'first-pass success' in ASIC development cycles.
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
- 10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification.
- 10+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies.
- Experience in one or more of the following areas along with functional verification-SV Assertions, Formal, Emulation.
- Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments.
- Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle.
Preferred Qualifications
- Experience verifying GPU/CPU designs.
- Experience in development of UVM based verification environments from scratch.
- Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs.
- Experience with revision control systems like Mercurial(Hg), Git or SVN.
- Experience with verification of ARM/RISC-V based sub-systems or SoCs.
- Experience with IP or integration verification of high-speed interfaces like PCIe, DDR, Ethernet.
- Experience working across and building relationships with cross-functional design, model and emulation teams.
About Meta
$173,000/year to $249,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about at Meta.
משרות נוספות שיכולות לעניין אותך
