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Microsoft Senior Hardware Engineer 
Taiwan, New Taipei, New Taipei 
222382015

10.09.2024

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate, high-energy engineers to help achieve that mission.

As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Hardware, Infrastructure Management, and Fundamentals Engineering (HIFE) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery,and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions,and industry knowledge to envision and implement future technical solutions that will manage andthe Cloud infrastructure.

Senior Hardware Engineerto support hardware development and validation of AI server hardware liquid cooling solutions and influence future generations of AI hardware.AI and.We immensely value culture, mentorship, and acting as a unified team. This is an opportunity toand grow your existing HW design experience in an innovative and highly collaborative environment where the results of your work will matter to Microsoft and Microsoft’s customers.

Required Qualifications:

  • 7+ years of technical engineering experience
    • OR Bachelor's degree in Computer Engineering, or related field AND 5+ years of technical engineering experience
    • OR Master's degree in Computer Engineering, or related field AND 3+ years of technical engineering experience
    • OR Doctorate degree in , Computer Engineering, or related field.
  • 5+ years’ experience developing and testing motherboards and/or microcontroller systems.
  • 5+ years’experience developingand testing HW power on, reset, and board management functionality.

Other Requirements:

Abilityto meet Microsoft, customer and/or government security screening requirementsrequired for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Preferred Qualifications:

  • 5+ years’experiencedeveloping CPLD/FPGA test benches and bus models.
  • Experience debugging CPLD/FPGA code deployed in data centers.
  • Experience developing control systems for sensors and actuators.
  • Experience with basic board level electrical validation.
  • Experience using high-speed scopes, Logic Analyzers, etc.
  • executingHWvalidationand functional test plans.
  • Experience working across disciplines and organizations
  • Fundamental knowledge of the following HW design principles:Electrical Engineering,Computer Architecture

Responsibilities
  • Develop motherboards and control systems for AI GPU server liquid cooling solutionscontainingtemperature, pressure, and flow sensors, and control actuators.
  • Working with suppliers on sensorselection, design, and validation of control systems for rack and server level liquid cooling solutions
  • Work with mechanical, thermal and system engineers to develop cooling solutions for next generation AI data centers.
  • Develop CPLD RTL code for motherboards and controller boards that implements custom power up, reset and management functions.
  • Write CPLD validation infrastructures, test benches, bus models and IO transaction models.
  • Work with internal and external partners to define and specify boardlevel validation and testrequirementsand ensure execution.
  • Work with partner teams to support siliconbringupand silicon validation.
  • Work with partner teams to create bring-up, test,andend-to-end systemvalidation plansto ensurecomplete board level coverage.
  • Collaborate with partner ODM/OEM companiesin test, debug, and validation area.
  • Plan lab, system hardware, test equipment, and test content availability for validation.
  • Embody our and