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Google Formal Verification Lead Engineer Silicon India, Karnataka, Bengaluru 186204010
Yesterday
Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience with formal model checking for ASICs and FPGAs, SystemVerilog and SystemVerilog Assertions.
- Experience with formal verification EDA tools.
- Experience with model checking frameworks such as Murphi or TLA+.
Preferred qualifications:
- Master's or PhD degree in Computer Science, Electrical Engineering, or a related field.
- Experience working with one or more formal verification tools, such as JasperGold, VC Formal, Questa Formal, 360-DV.
- Experience with a scripting language like Perl, Tcl or Python.
- Experience with propositional logic, theorem proving and tools such as Z3.
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