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Apple RTL Design Engineer United States, Texas, Austin 180252969
18.11.2024
Description
In this job you will gain the opportunity to specify micro-architecting digital blocks in advanced mixed-signal circuits. You will be also responsible for RTL coding of blocks specified by you or others. You will participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will participate in the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Minimum Qualifications
- BS degree in technical discipline with minimum 3 years of relevant experience
Preferred Qualifications
- Deep understanding of mixed signal concepts, along with RTL design fundamentals
- Deep knowledge of Verilog and System-Verilog
- Experience with front-end tools (Verilog simulators, linters, clock-domain crossing checkers)
- Working knowledge of synthesis, static timing, DFT is a huge plus
- Some working experience with System-Verilog assertions, checkers, and other design verification techniques
- Knowledge of SerDes, algorithm developments, scripting languages such as Perl and Python are plusses
- Strong communication, collaboration and presentation skills
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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