Broadcom ASIC RTL Design Engineer 

United States, California, San Jose 

177292223

Requirements:

• Bechelor's Degree in Electrical Engineering, Computer Engineering or Computer Science and 8+ years of meaningful experience in SOC architecture and design experience or Master’s Degree in Electrical Engineering, Computer Engineering, or Computer Science and 6+ years of meaningful experience in SOC architecture and design experience.

• Verification experience is a plus.

• Experience in micro-architecture and RTL development.

• Worked on architecture definitions on clocks, resets, interconnects, IO interfaces.

• Worked on ARM based SoC

• Should have knowledge onLint, CDC, SDC, Verification strategy at SoC level.

• Experience in chip-to-chip communication protocols in MCM case is a huge plus

• Comfortable in solving the architecture problems from micro-architecture to system level.

• Strong experience with Verilog, System Verilog

• Strong experience in Tcl, Perl, Python scripting

• Good understanding of ASIC design flow

• Strong interpersonal skills and an excellent team player

Compensation and Benefits

The annual base salary range for this position is $119,000 - $190,000.

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.