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Google Senior CPU RTL Front End Designer 
United States, Texas, Austin 
175430562

20.02.2025
Info Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA.Note: By applying to this position you will have an opportunity to share your preferred working location from the following:.
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
  • Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques.

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture, or a related field.