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We are seeking experienced Senior Substrate CAD layout Engineer for the next generation of our ML ASIC. This is a fast-paced, intellectually challenging position, and you’ll work with thought leaders in multiple technology areas. You’ll have relentlessly high standards for yourself and everyone you work with, and you’ll be constantly looking for ways to improve your products performance, quality and cost.We’re changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.As a Substrate/PCB layout engineer you will participate in the definition and implementation of substrate and PCB boards. This individual will contribute in all phases of the product’s design, including placement, routing, constraint table management, and drafting. You must bring a combination of Substrate/PCB design, assembly, test and fabrication knowledge, cross team functional interdependence, and demonstrable design process experience to the position. In this role you will:
Work with fabrication vendors to supply data and seek fabrication design requirements
Work with assembly vendors to supply data and seek assembly design requirements
Deliver best in class Substrate/PCB design to high-volume manufacturing
Assist as necessary in schematic and PCB footprint development
B.S. in Electrical Engineering or related field
7+ years of experience of PCB layout design
7+ years of current experience using Cadence Allegro PCB Design/CIS
7+ years of current experience using Cadence SIP and APD
7+ years of experience with high speed and impedance circuits
7+ years of experience with compact, dual side assembly design
Experience with HDI design
Experience with BGA pitch of equal or less than 0.5mm
M.S. in Electrical Engineering or related field
15+ years’ experience of PCB layout design
10+ years of current experience using Cadence APD, SIP and Allegro PCB Design/CIS
Proven track record to design & manage all aspects of the printed board design
Ability to collaborate and communicate with all cross functional teams and external customers.
Ability to reduce risk of fabrication/assembly/test with a thorough knowledge in each area and taking preventative action early in the design phase to make this a reality
Ability to debug schematic net-list-in errors
Ability to develop Allegro scripts or writing in Cadence Skill
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