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Apple Analog Mixed Signal IP Integration Engineer United States, Oregon, Beaverton 156481927
07.04.2025
- Define and specify deliverable requirements for IP provided by external vendors- Driving discussions with vendors regarding these requirements, their design and verification methodology- Review IP quality on incoming deliverables- Provide support to Apple SOC front-end and back-end design teams for integrating the IP
- BSEE/MSEE and 7+ years industry related experience.
- Experience in RTL design, verification or integration
- Deep knowledge and experience with front-end tools such as simulation, synthesis, lint, logic equivalence, static timing analysis, CDC, RDC, and UPF
- Familiarity with SOC design flow and verification methodologies
- Good understanding of DFT requirements for SOCs
- Experience writing Verilog, SystemVerilog, SVA hardware description languages
- Experience with Verilog modeling and model validation is a plus
- Experience with standards like PCI Express, MIPI, USB or DisplayPort is a plus
- Excellent written and verbal communication skills
- Strong initiative and ownership of responsibilities, productive, able to meet aggressive deadlines
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