Microsoft SoC Hardware Digital Analog PnP Validation Engineer 

United States, Oregon, Hillsboro 

154415565

Required Qualifications:

• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
  • 4+ years technical engineering experience.
• Applied understanding of Computer Architecture and CPU/SoC validation principles, including: Understanding of SoC subsystem, SoC system level, and platform level functionality and writing scripts/software with industry standard languages like Python or C/C++.

Other Requirements:

• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Preferred Qualifications:

• Proficient communication, collaboration and teamwork skills and ability to lead, grow, and contribute to diverse and inclusive teams.
• Verification, logic development, validation, or validation tools experience as part of a Central Processing Unit(CPU), SoC and/or IP development team
• One or more years of experience.
• Leadership skills.
• Demonstrated validation expertise in one or more of the following:Validation of:
  • Functional: Core,Peripheral Component Interconnect Express(PCIe), Memory Controller, Input Output(IO), Power Management, Coherency, Manageability, Basic Input Output system(BIOS)/Microcode development and debug, or Fuses
  • Electrical: Serdes, IO
  • Power and Performance
  • Automation, Content Creation, or Tools/Scripts Development
• Ability to develop and build kernels and modify existing commercial OS images adding SoC validation debug hooks, drivers, and various capabilities into them.
• Ability to develop synthetic SoC validation Core, Coherency, Memory, and IO content to run on both bare metal and Operating System(OS) environments.
• Ability to develop sophisticated tools/scripts to support SoC validation debug activities such as crash dumps and register dumps.
• Understanding of board level schematics.
• Understanding system level software and firmware.
• Experience running silicon content on pre-silicon platforms such as emulation orField-Programmable Gate Array(FPGA).
• Demonstrated success in hardware/software debug efforts.
• Hands on experience debugging silicon failures using on chip debug features (like trace or Joint Action Test Group(JTAG)) as well as test equipment (like protocol analyzers, bit error rate testers, logic analyzers, oscilloscopes)

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

Microsoft will accept applications for the role until December 5, 2024.

The Silicon computing development team is seeking aSoC Hardware (Digital, Analog or PnP) Validation Engineerto join the post-silicon validation (including functional, electrical, and power/performance aspects) team for our projects. This new team will be involved in numerous projects within Microsoft developing custom silicon for a diverse set of systems. We are responsible for delivering cutting-edge, custom SoC designs that can perform complex and high-performance functions in the most efficient manner. As a
SoC Hardware (Digital, Analog or PnP) Validation Engineerin this high impact role on the team, you will:

• Own post-silicon validation of one of the following areas - functional, electrical, or power/performance.
• Define, guide, and contribute to the implementation of silicon debug tools and capabilities.
• Become proficient on the overall architecture, implementation of complex features/flows/protocols, and their interactions with other parts of the System on Chip(SoC), with the platform, and with software.
• Provide technical guidance, coaching, and mentorship to other engineers in your areas of expertise.
• Develop validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements.
• Apply your knowledge of validation principles and techniques and your judgement to write test plans and implement them by developing test content, scripts, tools and other validation collateral.
• Execute content in post-silicon, triage and debug failures.
• Apply your growth mindset to learn and adapt in a complex and dynamic environment.
• Engage with partners to drive continuous improvement to the design, to validation plans/collateral, and methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably.
• Apply your One Microsoft mentality to collaborate with and influence architects, logic designers, verification engineers, other post-silicon validators, and Intellectual Property(IP) and tool providers.
• Delight your customers by providing high quality results on schedule.
• Provide technical leadership with respect and integrity.
• Apply your expertise towards pre-silicon verification plans, tests, and debug of your area.
• Other
  • Embody our and