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Cisco Test Development Engineering Technical Leader United States, Georgia, Atlanta 139316487
23.06.2025
The application window is expected to close on: 6/20/25.
NOTE: Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
This position is based in San Jose, California.
Your Impact
You will be leading cross functional activities vital for quick test coverage ramp, silicon and pattern debug as well as executive communications.
- Lead Post-Silicon Execution: Own and drive the post-silicon test and ATE bring up of sophisticated SoC , ensuring first-time-right silicon and timely execution.
- Cross-Functional Teamwork: Partner with design, validation, DFX to develop, validate, and deliver high-quality products.
- Strategy & Execution: Define and implement robust product development strategies, test plans, and bring-up methodologies for high-performance network silicon.
- Technical Leadership: Fix complex silicon/system-level issues, perform data analysis, and derive actionable insights to improve performance and yield.
- Stakeholder Communication: Clearly present technical updates, risk assessments, and achievement progress to leadership and cross-functional partners.
- Innovation: Continuously assess and refine development methodologies, embracing cutting-edge tools and technologies to improve efficiency.
- Customer & Partner Engagement: Collaborate with external foundry partners, IP vendors, and strategic customers to align on expectations and resolve critical issues.
- Risk Management: Proactively identify project risks and implement mitigation plans throughout the product development lifecycle.
Minimum Qualifications:
- Bachelor's Degree in Electrical Engineering.
- 10+ years of experience in semiconductor product development, with strong emphasis on post-silicon validation and high-volume manufacturing.
- Strong expertise in digital and mixed-signal design, test program development, bring-up, and debug.
- Proficiency in using ATEs, scripting languages (Python, Perl, Shell) and hardware description languages (Verilog, SystemVerilog, or VHDL).
- Understanding of SoC (System on Chip) architecture
- Experience with lab tools and equipment (oscilloscopes, logic analyzers, JTAG, etc.
- Experience with SerDes, MBIST and ATPG methodologies, patterns, and tools.
- Prior experience with silicon bring-up, yield analysis, and ATE and system test development.
Preferred Qualifications:
- PhD or Master's Degree in Electrical Engineering.
- Ability to lead multi-disciplinary teams and drive multi-functional alignment.
- Proven communication and presentation skills, including experience engaging with executive partners and customers.
- Organizational and program management abilities, with proven success leading multiple concurrent product efforts.
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