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Nvidia Senior Generative AI Research Engineer 
United States, California 
115809238

Today
US, CA, Santa Clara
US, TX, Austin
time type
Full time
posted on
Posted 2 Days Ago
job requisition id

What you’ll be doing:

  • Invent and optimize new methods for floorplanning and chip-level optimization tools.

  • Develop machine learning strategies to improve efficiency of design space exploration.

  • Explore high performance algorithms for block placement, datapath estimation and other details of early design estimation, especially that efficiently incorporate human insight.

  • Explore use of LLMs (Large Language Models), GNNs (Graph Neural Networks), GANs (Generative Adversarial Networks), and Reinforcement Learning for efficient EDA solution.

  • As with any software engineering team, we do write a lot of code, but this is broader than a typical CAD or EDA role. Instead, we as a team own the whole process from discovery and invention of new optimization opportunities to the final deployment of solution. Team members enjoy considerable flexibility in defining new projects and exploring new technical domains. That translates to a bigger picture view of your work, going beyond simply responding to user requests to instead actively driving the roadmap of growing hardware design productivity.

What we need to see:

  • MS or PhD in Electrical Engineering or Computer Science or equivalent experience

  • 10+ years of EDA software and VLSI hardware design

  • Proven track record in software development with C++, particularly in algorithm development related to graph, placement, optimization, analysis and visualization.

  • Familiarity with related EDA techniques, including floorplanning, placement, routability, partitioning, static timing analysis, and SAT solvers

Ways to stand out from the crowd:

  • C++17/C++14 experience, such as lambdas and concurrency

  • Deep understanding of algorithm design principles such as complexity analysis, multithreading, distributed computing, efficient memory and I/O use, etc.

  • Experience in chip level floorplanning, timing estimation and design optimization etc.

  • Familiarity with various machine learning techniques for analysis, optimization, and use of AI code generation tools

  • Good communication and interpersonal skills

You will also be eligible for equity and .