As a DFT engineer we are involved with the complete DFT solution for a design project, you will have responsibilities spanning all aspects of semiconductor design.
Minimum of BS + 3 years relevant industry experience.
Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time.
Experience developing DFT specifications and driving DFT architecture and methods for designs.
Knowledge of Verilog and/or VHDL, and experience with simulators and waveform debugging tools.
Knowledge of industry standards for DFT and design tools.
Proven Understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon.
Experience in debugging Compressed ATPG patterns, MBIST, and JTAG/1500 related issues.
Experience with STA constraints development and analysis for DFT modes and SDF simulations.
Ability to conduct experiments during silicon debug, gathering and analyzing data; and use scripting to support efficient handling of ATE data.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.