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Apple SoC DFT Engineer United States, California, Cupertino 110925470
05.09.2024
Description
As a DFT engineer we are involved with the complete DFT solution for a design project, you will have responsibilities spanning all aspects of semiconductor design.
Minimum Qualifications
- Minimum of BS + 3 years relevant industry experience
Preferred Qualifications
- Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time.
- Experience developing DFT specifications and driving DFT architecture and methods for designs.
- Knowledge of Verilog and/or VHDL, and experience with simulators and waveform debugging tools.
- Knowledge of industry standards for DFT and design tools.
- Proven Understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon.
- Experience in debugging Compressed ATPG patterns, MBIST, and JTAG/1500 related issues.
- Experience with STA constraints development and analysis for DFT modes and SDF simulations.
- Ability to conduct experiments during silicon debug, gathering and analyzing data; and use scripting to support efficient handling of ATE data.
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $165,500 and $293,800, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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