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Apple CPU Microarchitect/RTL Engineer - Execution Load/Store United States, California 100082766
07.04.2025
As a CPU Microarchitect/RTL Engineer, you will own or participate in the following:• Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification • RTL ownership – development, assessment and refinement of RTL design to target power, performance, area and timing goals • Validation - support test bench development and simulation for functional and performance verification• Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance • Design delivery - work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability, and power
- Minimum BS and 10+ years of relevant industry experience
- Knowledge of microprocessor architecture
- Knowledge of Verilog and/or VHDL
- Experience with simulators and waveform debugging tools
- Knowledge of logic design principles along with timing and power implications
- Expertise in one or more of the following areas: out-of-order execution, instruction scheduling, integer and floating point execution, load/store execution, cache and memory subsystems
- Understanding of low power microarchitecture techniques
- Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
- Experience in C or C++ programming
- Experience using an interpretive language such as Perl or Python
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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