דרושים Nvidia Internships Hardware Verification ב-אנבידיה ב-ארהב

What you will be doing:

• Work in a combined design and verification team which develops core units within the Networking silicon.

• Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.

• Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.

• Lead the verification effort for core switching fabrics, packet buffering architectures, and traffic management subsystems, ensuring functional correctness and performance at scale.

What we need to see:

• B.SC./ M.SC. in Computer Engineering /ElectricalEngineering/CommunicationEngineering or equivalent experience

• 8+ years of proven experience in Design Verification.

• Proven, hands-on experience verifying sophisticated network switching ASICs, with deep knowledge of core switching logic and advanced buffering architectures

• Demonstrated ability to own verification strategy and execution from the block-level through full-chip (SoC) integration.

• Sharp analytical and debugging skills with a track record of root-causing complex hardware, testbench, or software-driven issues.

• Excellent organizational and communication skills, with the ability to manage priorities and negotiate solutions across design, verification, and architecture teams.

Ways to stand out from the crowd:

• Deep experience verifying advanced traffic management (TM) and Quality of Service (QoS) features, such as complex schedulers, shapers, and congestion control mechanisms

• Proven experience building performance-focused verification environments to measure and stress test latency, throughput, and fairness

• Knowledge in SimVision and Xcelium

ATE/SLT hardware team provides the interface hardware of IC package testing at final test and system level test. Hardware includes highly custom high-speed sockets, active thermal plungers, and load boards. Take an active role in hardware design for both product bring-up and HVM, design and manufacture improvement, and verification/debug, to production support.

What you’ll be doing:

• Review and approve the design of test socket, thermal plunger, and other accessories related to ATE/SLT IC testing for product bring-up and production.

• Provide ATE and SLT test fixture/HW solutions from design, manufacturing order, schedule monitoring, verification, and improvement.

• Drive ATE and SLT socket/thermal technology, solutions, and qualifications.

• Drive DOE with a sense of responsibility from collecting and analyzing engineering data and making decisions and recommendations for improvement.

• Provide cross-functional support.

• Drive a project and host a meeting internal and external stakeholders.

• Apply strong hardware troubleshooting and root-cause analysis. Possess the ability to provide preventive actions.

• Able to debug ATE/SLT hardware setup such as socket, thermal plunger, PCB, chiller, and handler.

• Require on-duty lab support. Weekend support may be necessary.

What we need to see:

• Bachelor’s degree or equivalent experience is required. EE and ME related degrees are preferred.

• 5 plus years of IC testing engineering and ATE/SLT hardware engineering experience.

• Having test socket knowledge is a strong plus. Familiar with test socket mechanics, footprints, and contact pins.

• Fully capable of understanding mechanical drawings and knowing mechanical and electrical circuit knowledge.

• Have IC testing knowledge of ATE/SLT interface hardware, maintenance, troubleshooting, and repairs. (Socket, load board, thermal plungers)

• Having ATE tester knowledge is a plus.

• Proven troubleshooting skills and ability to provide solutions and prevent reoccurrence.

• Willing to conduct hands-on-work such as socket pin repair, electric wire, and tiny capacitor/resistor.

• Able to lift 30 pounds load board during unboxing, boxing, and a short transportation.

• Have the knowledge of prevention and control of electrostatic discharge (ESD)

What you'll be doing:

• Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in groundbreaking sub-micron CMOS technologies using Cadence tools.

• You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.

• Take part in floor planning, custom layout and verifying against design rules and schematics.

What we need to see:

• Have a BSEE or equivalent experience.

• Minimum of 7+ years proven experience in Mask and Layout Design.

• Deep understanding of analog circuit layout concepts in submicron CMOS technologies.

• You are an authority with Cadence custom circuit design tools - particularly virtuoso.

• Experience running and debugging with verification tools such as Dracula, Hercules, Calibre, and Primeyield.

• You are able to work optimally in a team, good interpersonal skills, passion and positive energy.

• Proficient in scripting languages like perl, python, skill etc.

• Should have knowledge of DRC and LVS checking flows, ability to customize decks.

What you'll be doing:

• Leading the end-to-end product lifecycle, from new features to supporting new AI platforms, delivering multiple releases per year.

• Collaborating with cross-functional teams, including engineering, marketing, and sales, to successfully implement product strategies and roadmaps.

• Writing clear requirements, user stories, and compelling user experiences to ensure a quality product.

• Managing release schedules and coordinating with development teams to ensure timely delivery of enterprise software products.

• Applying sophisticated product management software to monitor progress, track metrics, and report on the success of product initiatives.

What we need to see:

• Bachelor's degree in Computer Science, Engineering, or equivalent experience.

• Minimum of 8 years of experience in software product management.

• Extensive hands-on experience with compute, network, and storage technologies.

• Proven proficiency in release management strategies and adept utilization of product management software tools.

• Proven written and verbal communication skills. Ability to effectively connect with technical and non-technical stakeholders.

• Leadership skills! Remove obstacles. Resolve ambiguity. Comfortable presenting and defending your fact-based opinion or recommendation.

Ways to stand out from the crowd:

• Hands-on experience with NVIDIA Base Command Manager or Bright Cluster Manager

• Experience as an SRE, datacenter operator, infrastructure manager

• Experience with high-performance computing

• Background with Software Development Life Cycle

What you’ll be doing:

• You get the benefit of working with leaders across the NVIDIA organization in the NVIDIA leadership program in an apprenticeship model that will build you into a future senior business leader.

• Lead and complete short and long-term projects across a rotation of industries and product segments, working with leaders as a part of their team for an agreed timeframe. After several years, you will transfer over to one of these industries or a segment team full time.

• Planning and producing sales assets, marketing deliverables, and positioning crucial to educate companies on the necessity and value of artificial intelligence. Deliverables may include a combination of analytics (e.g., financial models), whitepapers (e.g., customer success stories), keynote presentations, and field enablement (e.g., sales decks).

• Help industry teams articulate their business development strategies to the CEO and WWFO Leadership

• Assist the CEO’s core team to articulate major customer and partnership announcements at global AI events!

• Helping to run the cadence of ongoing executive meetings for a very fast-paced sales environment.

• Develop domain expertise in chosen industries - able to meet, present, and partner with customer execs and developers on their issues, talk at the EBC, and run enablement training.

What we need to see:

• Bachelor's degree in a related business or technical subject or equivalent experience.

• 8+ years' work experience - at major consulting firms, OEM, CSP, ISV, or startup.

• A positive, can-do attitude with deep curiosity in NVIDIA tech-stack & AI

• Good cultural fit-focused, able to listen, understand and answer the question; looking for the best way to solve the problem at the speed of light, etc..

• Ability to Influence and motivate cross-functional teams to execute GTM initiatives, align around shared goals, and get results in fast-moving, complex environments.

• Excellent interpersonal, organizational, written, and verbal communication skills; able to quickly learn, distill, and synthesize complex subjects into clear, actionable insights.

• High tolerance for change, able to pivot, and deliver against many opinions.

• Works well in highly outstanding, matrixed organization where the mission matters more than the org chart.

• Power user with knowledge of AI LLMs, internet and office apps.

Ways to stand out from the crowd:

• Evidence of dedication to prioritizing multiple projects, relationships, and learning to adapt quickly to need.

• A real passion for getting things done in multifaceted sales and technology environment.

• Excellent interpersonal, organizational, written, and verbal communication skills; able to quickly learn, distill, and synthesize complex subjects into clear, actionable insights.

• Post-graduate or equivalent experience in a relevant field (e.g. MBA, computer science).

What you'll be doing:

• Working with NVIDIA multi-functional teams for GPU and SoC feature development, testing, and debugging.

• Provide technical support during development, testing, and production.

• Perform hardware and software design reviews to ensure customer designs meet NVIDIA guidelines.

• Conduct the installation, configuration, debug and bring-up of customer hardware.

• Work directly with NVIDIA customers, and analyze data to answer questions, reproduce errors, resolve, or escalate customer issues.

• Be involved in customer interaction, set up and drive customer communication via conference calls, and face to face meetings.

• Supervise, file new bugs and reproduce issues as needed.

• Build design guides, application notes and other supporting technical collateral.

• Working with PMIC, Power sequence, battery life and regulator design.

What we need to see:

• BS or higher in EE or Systems Engineering or equivalent experience.

• 5 years’ experience with notebook system design (hardware and Software), Programming knowledge in Python/C/C++/ VB/ Linux Shell programming.

• 5 years’ experience with regulator and PMIC design, PDN analysis, power sequence.

• Professional-level interpersonal skills, including your ability to adjust your communication to the technical level of the audience; Drive technical issues across multiple teams.

• Possess a nurtured knowledge of Linux, and be very comfortable working in various Linux environments as well as with Windows OS’s.

• Good knowledge of X86 System Architecture and ACPI.

• Familiar with computer system architecture, microprocessor, and microcontroller fundamentals (caches, buses, memory controllers, DMA, etc).

Ways to stand out from the crowd:

• BIOS engineer experience for 2+ years.

• Experience with ARM, PMIC, Regulator.

• Experiences on SBIOS features developing specific platforms. (MMIO, SMBus, IPMI, IOAPIC will be plus).

• Hardware design and knowledge of PCIe, I2C, DP/eDP/HDMI, USB-C, I2S, SATA.

• Extensive Knowledge of notebook hardware, circuit design, power, thermal and electrical systems.

What you'll be doing:

• Responsible for support and debug of physical implementation GPU and SOC reticle-sized chips, coordinating with the PNR team to achieve SOL tape-out – including feedback recognition and correlation.

• Determining physical verification methodologies to improve workflow efficiency and timely issue detection. Integrate new workflows and checks into larger workflow automation systems.

• Participate in developing physical verification flows for new technologies - DRC, LVS, Antenna flows - improving automation and expert workflows.

• TSMC A16 rules and tape-out experience is preferred.

What we need to see:

• BS/MS in Electrical Engineering or related field (or equivalent experience)

• Minimum 4+ years of physical implementation experience with 4+ years in physical verification build and debug (can run concurrently).

• Familiar with aspects of chip design including Floor planning, Clock and Power distribution, Place and Route, Integration and Verification.

• Strong knowledge and experience with Physical Verification debug of shorts/compare results across DRC/LVS/Antenna related issues in both PV signoff tools as well as EDA implementation tools (ICC2/Innovus/other)

• Direct experience with ICV and Calibre runsets for physical verification of DRC/LVS/Antenna.

• Good scripting skills in Python/Perl or other related automation languages.

Ways to stand out from the crowd:

• Exposure to Virtuoso or ICWeb platforms , AI application to PV analysis or workflows, workflow automation experience.

• Proficient in writing DRC/LVS rules, including advanced checks tailored to specific design requirements for ICV and CALIBRE tools.

• Understanding of AI Chat and/or Agentive systems applied in the PV domain.