דרושים Senior Layout Engineer ב-Marvell ב-סינגפור

What You Can Expect

Design and execute post silicon validation tests for SSD Chipsets, during R&D processes.
Develop, port and execute bare metal SW to validate Storage SoC's.
Job will involve Pre and Post Si testing of the bare metal functionality of the Storage SoC, including performance, and powerDevelop testing and benchmarking applications.
Analyze the test results and generate professional validation reports.Provide technical support to Test Engineers who design tests for mass production.

What We're Looking For

engineer with experience in Solid States Drive.Proficient in C/C++ , Arm Assembly , 64 bit Arm CPU architecture.
Experience in Firmware Development under Bare Metal/Linux Environment and Debugging on SoCs for embedded Applications
Understanding of SSD controller is preferred
Experience in interfaces like NAND/PCIe/NVMe/DDR is a plus
Good communication skills in English, written and spoken.Should be able to work on a given task independently

What You Can Expect

In this role, you will:

• Customer Support: Proactively and efficiently support Marvell's Optical PAM4 DSP products, acting as the primary technical interface between customers and Marvell's engineering teams to resolve technical issues
• Issue Resolution: Own and drive customer issues to resolution, collaborating with Field Application Engineers (FAEs) and Product Line Managers (PLMs) to gather and communicate customer needs to marketing and engineering teams
• Design Collaboration: Review customer designs utilizing Marvell ODSP products, providing guidance to ensure optimal integration and performance within their platforms.​
• Feature Evaluation: Evaluate hardware and software features from DSPs and develop implementation plans for qualification and testing.​
• Test Plan Development: Collaborate with vendors and manufacturers to define and develop test plans for Optical Modules and PHY chips, ensuring compliance with industry standards and performance expectations.​
• Automation and Qualification: Automate optical test plans and qualify optical modules from various vendors with different switches, enhancing efficiency and reliability in validation processes

What We're Looking For

• Educational Background: Bachelor’s degree in Computer Science, Electrical Engineering, or related fields with 15+ years of related professional experience; OR Master’s degree with 10+ years of experience; OR PhD with 8+ years of experience.​
• Technical Expertise:
  • Good understanding of digital signal processing (DSP), analog circuits, and system hardware
  • Lab experience with PAM4 SerDes TX and RX validation is preferred.​
  • Hands-on experience in network environments, with a minimum of 2+ years.​
  • Experience with transceivers and familiarity with IEEE standards, with at least 1+ year of experience.​
  • Proficiency in networking protocols and technologies, with a minimum of 1+ year of experience.​
  • Experience in developing test scripts for validation and characterization, with at least 1+ year of experience.​
• Communication Skills: Strong verbal and written communication skills, with the ability to effectively convey complex technical information to diverse audiences.​
• Programming Skills: Knowledge in C and/or Python is a plus.​
• Additional Requirements: Occasional travel is required (approximately 5%, both domestic and international).​

Expected Base Pay Range (USD)

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

What You Can Expect

• Act as the Subject Matter Expert (SME) and primary liaison for facilities systems, ensuring their seamless operation and addressing issues promptly.
• Define and execute strategic roadmaps for facilities systems, aligning with organizational goals and operational needs.
• Lead and manage enhancements to existing facilities systems to drive efficiency, user experience, and functionality.
• Collaborate with cross-functional teams, including IT, Facilities, and Operations, to plan, design, and deploy new facilities system initiatives.
• Conduct thorough analysis of current processes and identify opportunities for technology-driven improvements.
• Develop, update, and maintaincomprehensive documentationfor system enhancements, integrations, and new implementations.
• Provide training, guidance, and ongoing support to end-users to maximize adoption and utilization of facilities systems.
• Ensure compliance with industry standards, emerging technologies, and best practices in facilities management and technology integration.

Educational Background:

• Bachelor’s degree in engineering, computer science, or a closely related technical field. Equivalent degrees will also be considered based on relevance.

Technical and Software Expertise:

• Minimum 10 years experience designing and implementing business applications.
• Minimum 5+ years expertise in implementing and managing facilities management software systems.
• Hands on experience with Integrated Workplace Management Systems (IWMS) such as Planon, Archibus, Manhattan, or Tririga, including functionalities like lease management, space management, asset management, maintenance and reservations.
• Demonstrable expertise in Building Automation Systems (e.g. Schneider, Siemens) and integrating these technologies.
• Strong analytical capability to evaluate multiple projects, prioritize tasks, and deliver results aligned with business objectives.
• Proven ability to assess and redesign processes to enhance operational efficiency.
• Excellent documentation skills, attention to detail, and ability to communicate effectively with both technical and non-technical audiences.
• Proficient in MS Office Suite, with a strong emphasis on Word and PowerPoint.

Leadership and Collaboration:

• Demonstrated ability to work independently while fostering collaboration with diverse teams.
• Strong interpersonal and strategic problem-solving skills.
• Self-starter who takes ownership of tasks and ensures on-time delivery of projects.
• Committed to maintaining high standards and staying up to date with emerging trends in facilities management and technology.

Expected Base Pay Range (USD)

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

What You Can Expect

• Check RTL design quality; create timing constraints for synthesis and static timing analysis.

• Perform logic synthesis and deliver gate netlist for DFT insertion and physical design.

• Perform timing analysis and timing signoff for chip tapeout.

• Conduct low power design; perform power and IR drop analysis.

• Perform DFT insertion in logic compilation environment.

• Perform formal verification to check logic equivalency between golden and revised design.

• Participate in logic design for timing critical blocks.

• Work closely with and support physical design engineers in Place and Route and design integration.

• Research and evaluate advanced design flows and methodologies for Automotive Ethernet products.

What We're Looking For

• Master’s Degree inElectronics/ElectricalEngineering or related fields with coursework in digital logic design, computer architecture.

• 7~12 years of hand-on experience in digital design, running EDA tools for simulation, synthesis, timing analysis and formal verification.

• Solid knowledge and background in ASIC development.

• Proficiency in Linux shell scripting and scripting languages such as Perl, Python, Tcl, and Make.

• Having passion in technology; being flexible, goal oriented, and team player.

• Excellent verbal and written communication skills.

• RTL coding experience/DFT design experience is a plus.

• Advanced technology and large SOC chip signoff experience is a plus.

What You Can Expect

Marvell is seeking an RF and Analog Design Engineer to contribute to the development of multi-tens of GHz transimpedance amplifiers (TIAs). These optical interface chips are tightly coupled with our high-performance equalizers. The results of our innovative designs have made our TIAs best in class for coherent long-haul and metro systems as well as PAM4 data center systems. In this role you will be responsible for:

• Active-circuit design.
• Design of leading edge transimpedance amplifiers, using both SiGe BiCMOS and the most advanced CMOS FinFET technologies, where circuit performance will need to transcend beyond industry leading products.
• Development of transmission line structures and other millimeter wave structures to enable higher performance than would normally be achievable.
• Design of high-performance broadband analog circuits for optical front-end receivers.
• Design of various other analog circuits including linear regulators, AGC loops, current/voltage sensors, bandgaps etc.
• Work with other functional groups to facilitate post-silicon validation, qualification, transition to mass production, and customer support.

What We're Looking For

• Bachelor’s degree in Electrical Engineering with 5+ years of industry experience OR Master’s or PhD degree in Electrical Engineering with 3+ years of industry experience in the area of designing high-performance RF/Analog Receiver/TIA.
• Proven experience in high-performance receiver design including both chip tape-out AND lab evaluation.
• Solid experience in.
  • Using EDA CAD tools
  • Performing Analog Custom Layout
• Experience in measuring IC performance and debug of design to correlate simulations to measurements.
• Deep understanding of fundamentals, including:
  • Detailed transistor level design.
  • Device physics.
  • Control/Feedback loop stability analysis.
• Direct project experience in at least one of the following areas is a plus:
  • Automatic gain-control loops.
  • High precision analog circuits including linear regulators, current sensors, bandgaps and DAC/ADC.
  • Continuous-time linear equalizers.
• Experience in Package-System integration issues is desired.
• Project experience in using different technologies. (SiGe BiCMOS and FinFET CMOS are pluses)
• A team-player.
• Experience in the following is a plus:
  • Overseeing and mentoring junior circuit designers.
  • Experience as chip lead with success in silicon.
  • Experience in taking chips to mass production.
  • Ability to translate chip level specifications into architecture.
• Strong communication, presentation and documentation skills.

Expected Base Pay Range (USD)

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

What You Can Expect

• The position will be responsible for implementing and validation DFT/Test on complex IP and SOC for multiple Custom/Compute ASIC/SoC designs
• The execution involves Implementation of various DFT/DFX features, Scan/MBIST Insertion & Validation, ATPG , IP-DFT, STA, pattern generation & Post-Silicon Bringup and Debug for various designs in Custom/Compute space.
• In this position, the responsibility also includes mentoring, guiding and driving a small team of engineers enabling them for scaling across multiple designs.
• The position also involves definition and enhancement of DFT methodologies and tools to be able to benchmark them and enable new methodologies in the domain of DFT/Test.

What We're Looking For

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10+ years of related professional experience.
• Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 8+ years of experience.
• Hands on working experience in various stages of DFT-Execution SCANInsertion/ATPG/MBIST/Validation/STA/IP-DFX/Post-SiliconBringup/Debug
• Strong fundamentals in Digital Circuit Design and Logic Design is required
• Knowledge on various DFT/Test solutions
• Understanding of DFT Flows and Methodologies and Experience withSiemens/Synopsys/CadenceTool set(Tessent/DC,Spyglass,Tmax,VCS/Genus,Modus,NCSim)
• Prior experience in ASIC design is a plus
• Scripting skills using PERL, Tcl and C-Shell is plus

What You Can Expect

• Configure the startup and runtime network configurations for embedded ethernet switches in line with customer expectations and industry standards.
• Utilize protocols such as Time Sensitive Networking (TSN), PTP-1588, MKA, and Macsec to ensure reliable and secure network communication.
• Use technologies like Yang, XML, YAML, and JSON, to effectively represent switch and network configuration.
• Provide feedback to the software and hardware team to optimize how switches are configured.
• Participate in design reviews, code reviews, and debugging sessions to ensure high-quality solutions.
• Develop and maintain comprehensive documentation, including network configuration guides, design documents, and test specifications.
• Stay up-to-date with industry trends and emerging technologies.
• Work on network drivers for Ethernet and Time Sensitive Networking and review the work of others.

What We're Looking For

• Bachelor’s degree in Computer Science, Electrical Engineering, or related fields with 5-8 years of professional experience, or a Master’s degree with 4-5 years of experience.
• Strong understanding of embedded Ethernet switch configuration for automotive applications.
• Familiarity with protocols such as Time Sensitive Networking (TSN), PTP-1588, MKA, Macsec.
• Experience with network management protocols and technologies like Yang, XML, YAML, and JSON.
• Excellent team and communication skills, with the ability to work effectively with remote teams.
• Proficiency in network configuration and optimization techniques.
• Familiarity with version control systems (e.g., git) and build environments (IDE, gmake).
• Excellent English language skills.
• Strong multitasking abilities.

Preferred:

• Familiarity with AUTOSAR networking protocols like SOME/IP, DoIP, UDS
• Experience in configuring Enterprise or Embedded network switches
• Hands-on experience with embedded diagnostics tools such as oscilloscopes, logic analyzers, and JTAG debuggers