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דרושים Staff Engineer - Dft ב-Marvell ב-India, Bengaluru

מצאו את ההתאמה המושלמת עבורכם עם אקספוינט! חפשו הזדמנויות עבודה בתור Staff Engineer - Dft ב-India, Bengaluru והצטרפו לרשת החברות המובילות בתעשיית ההייטק, כמו Marvell. הירשמו עכשיו ומצאו את עבודת החלומות שלך עם אקספוינט!
חברה (1)
אופי המשרה
קטגוריות תפקיד
שם תפקיד (1)
India
Bengaluru
נמצאו 9 משרות
04.09.2025
M

Marvell Senior Staff Engineer Verification India, Karnataka, Bengaluru

Limitless High-tech career opportunities - Expoint
Provide co-design support with both ESD simulations of circuits to maximize both performance and ESD protection robustness. Perform ESD design reviews and provide the required technical guidance for analog, foundational...
תיאור:
As a Digital IC Design Senior Staff/Principal Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be playing a crucial role in establishing ESD requirements and validating ESD solutions for Foundational IP, SerDes IP, and SOCs during the ESD qualification process. You will work closely with the Physical Design, Electrical Engineering, and SOC (System on Chip) teams to provide support from the initial design phase through failure analysis, issue root cause determination, and the development of corrective actions. Being part of interface design team, you will have opportunities for the development of IO circuit to customer specifications including the generation and delivery of final EDA views for the IP. Typical circuits to be developed include biasing blocks,protection circuits, regulators, amplifiers, switches, and a range of closed loop feedback circuits.


What You Can Expect

  • Provide co-design support with both ESD simulations of circuits to maximize both performance and ESD protection robustness.
  • Perform ESD design reviews and provide the required technical guidance for analog, foundational IP, SOCs, and qualification test chips for multiple technology nodes ranging from 45nm to 2nm across major foundry platforms.
  • Validate and characterize ESD circuits using ICV PERC, Calibre PERC, TLP-based SPICE simulation, and any other industry methods and tools.
  • Design enablement of ESD protection schemes for analog design like SerDes. This will include understanding ESD protection design, latch-up, transient latch-up as well as ESD design verification and EDA tools.
  • Continue the development of “best practices” for ESD in the technologies being supported.
  • Development and support of EDA tools for ESD design checking.
  • Development of circuits like Driver, Receiver, Overvoltage protection circuits, Fail safe I/O, Bandgap and Voltage Regulators.

What We're Looking For

  • Bachelor’s or Master’s degree and/or PhD inElectrical/ElectronicEngineering, Microelectronics or related fields and 8-15 years of related professional experience.
  • Expertise in custom circuit design, handling layout effect in advanced FinFET process design rules, process variability and circuit reliability issues that affect power, speed, area, and yield.
  • Advanced knowledge of on-chip ESD protection circuit design
  • Advanced knowledge of CAD design tools such as Cadence and SPICE
  • Applicant should have sufficient design experience to be able to effectively review designs and communicate ESD design deficiencies to product design engineering.
  • Advanced knowledge of ESD relevant device physics such as snapback and other high-level injection phenomenon/device operations
  • Fully familiar with industry ESD test standards and latest developments.
  • Experience with verifying ESD analysis for IP and SoC level using industry standard tools and methodologies.
  • Exposure and experience with the Custom ESD PERC code development will have added advantage to this role.
  • Experience with simulation skills using cadence including PEX, Monte Carlo, and Corner analysis.
  • Derive design specifications from customer requirement.
  • Requires effective communication between multiple sites and ability to work with multiple groups.

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23.08.2025
M

Marvell Senior Manager Staff - DFT India, Karnataka, Bengaluru

Limitless High-tech career opportunities - Expoint
Hands-on experience in designing mixed signal circuits including ADCs, DACs, RX, TX, PLLs, Filters, Bandgap bias circuits, regulators, and other analog circuits. Specialized depth and/or breadth of expertise. Ability to...
תיאור:

What You Can Expect

As an Analog/Mixed-Signal IC Design Engineer, you will be part of a key team designing highly sophisticated CMOS transceiver/SERDES products.Responsibilitieswould include implementation and verification of circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs etc. to meet key performance targets and performing design verification using industry standard tools such as Spectre, MATLAB etc.

What We're Looking For

·Hands-on experience in designing mixed signal circuits including ADCs, DACs, RX, TX, PLLs, Filters, Bandgap bias circuits, regulators, and other analog circuits.
·Specialized depth and/or breadth of expertise.
·Ability to apply innovative solutions to resolve complex issues.
·History of identifying and developing best practices that deliver high-quality and effective solutions.
·Strong knowledge on the deep sub-micron CMOS technologies.
·Knowledge and experience on low power and high speed design techniques.
·Excellent problem solving and analytical skills.
·Strong knowledge on IC design CAD tools such as Spectre, Spice, Matlab, Hsim, Verilog, etc.
·Lab testing skills to evaluate the prototype unit to the design specification.
· Completed a MS in Electrical Engineering with 15+ years of related experience or PhD degree in Electrical Engineering with 12+ years of related experience.

Expected Base Pay Range (USD)

192,600 - 285,050, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.


Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

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משרות נוספות שיכולות לעניין אותך

22.08.2025
M

Marvell Principal Engineer RTL ASIC Design India, Karnataka, Bengaluru

Limitless High-tech career opportunities - Expoint
Lead DV, emulation and post silicon validation execution with zero defect mindset. Define DV, emulation and post silicon validation scope. Define execution timelines working closely with stakeholders. Set goals, monitor,...
תיאור:

What You Can Expect

• Lead DV, emulation and post silicon validation execution with zero defect mindset.
• Define DV, emulation and post silicon validation scope.
• Define execution timelines working closely with stakeholders.
• Set goals, monitor, and take steps to keep the execution on track.
• Define DV methodology and verification strategies.
• Drive definition and implementation of DV TB architectures.
• Collaborate with Architecture, Design, DFT, PD, FW and system teams for successful product execution.
• Lead tool evaluation and selection.
• Drive continuous productivity improvements through incremental and forklift changes.
• Monitoring industry DV trends and adapting to key trends.
• Hire, build and retain high performance engineering team.
• Address continuous training and development needs of the team.

What We're Looking For

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 15+ years of related professional experience or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 10+ years of experience.
• Strong understanding of ASIC development process.
• Proven ability to lead ASIC development teams.
• Demonstrated track record of delivering high quality ASICs.
• Good understanding of SoC architecture, processor cores, memory, and peripheral interfaces.
• Excellent communication, interpersonal and presentation skills.
• Strong cross-functional leadership skills.
• Highly motivated, self-driven and curiosity to learn new technologies.

Expected Base Pay Range (USD)

203,000 - 300,480, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.


Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

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משרות נוספות שיכולות לעניין אותך

08.05.2025
M

Marvell Principal Staff Software Validation Engineer L1 Embedded sys... India, Karnataka, Bengaluru

Limitless High-tech career opportunities - Expoint
Develop and implement compensation strategies for the Americas region that align with the company's goals and market trends. Provide expert guidance and support to HR partners and business leaders on...
תיאור:

What You Can Expect

  • Develop and implement compensation strategies for the Americas region that align with the company's goals and market trends.
  • Provide expert guidance and support to HR partners and business leaders on compensation-related matters.
  • Monitor and analyze compensation data to identify trends, issues, and opportunities for to ensure competitive and equitable compensation and drive improvement within the Americas region.
  • Ensure compliance with local labor laws and regulations related to compensation across the Americas.
  • Collaborate with People Analytics and HRIS teams to enhance compensation data analytics and reporting capabilities.
  • Manage key compensation projects and initiatives from inception to completion, including developing project plans, setting timelines, and allocating resources effectively.
  • Develop and deliver training on compensation practices and policies to HR partners and business leaders within the region.
  • Stay updated on industry trends and best practices in compensation.

What We're Looking For

  • 5 – 10 years of experience working in large corporate compensation role.
  • Bachelor’s degree in business, arts, science or related field
  • Strong analytical and data interpretation skills
  • Strong collaboration and communication skills.
  • Strong English language skills
  • Proficiency in HRIS, particularly Workday.

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משרות נוספות שיכולות לעניין אותך

08.05.2025
M

Marvell Senior Staff Serdes Validation Engineer India, Karnataka, Bengaluru

Limitless High-tech career opportunities - Expoint
Day to day management of physical security measures atglobal headquarters andassigned region(reporting, investigations, event coverage assignments, access control measures, emergency response,ensuringaccess control andcamera systems are functioning andsupportingremediation). Fostering relationships with...
תיאור:

What You Can Expect

Experience in the following and not inclusive of:

  • Day to day management of physical security measures atglobal headquarters andassigned region(reporting, investigations, event coverage assignments, access control measures, emergency response,ensuringaccess control andcamera systems are functioning andsupportingremediation)

  • Fostering relationships with site assigned POCsfor collaboration and provide remoteassistanceas warranted

  • Implementation of strategies by senior management (emphasis on execution of andmaintainsecurity measures such as access controls, surveillance systems, and emergency response.)

  • Manages on-sitecontractsecurity teams that fall under j. (i.e., work with vendors in their sphere of influence to ensure no violation of co-employment legalities and report accordingly of shortcomings to next level to ensure service standards)

  • Analysis of costs for each location for roll-up into larger organizational requirements

  • Handles the on-location security opportunities, such as dealing with immediate risks at assigned locations

  • Site level problem solving that does not affect larger organization

  • Incident Response

  • Team oversight

  • Policy and Protocols

  • partments

  • Training staff and employees

  • Technical knowledge (access and monitoring systems)

  • Reporting and investigations

  • Familiarity with local security regulations

At Marvell Technology, our Global Physical Security team is dedicated to safeguarding our employees, assets, and operations worldwide. As the Physical Security Manager for the Americas region, you will play a crucial role in overseeing and managing security operations across multiple offices. Your leadership will be instrumental in developing and implementing security protocols, conducting risk assessments, managing security personnel, and ensuring compliance with local and international laws. Collaborating with various departments, you will promote a culture of safety and security that enables Marvell to innovate and excel in the semiconductor industry.

  • Incident Response:Lead and coordinate responses to security incidents, ensuring swift resolution and minimal impact on operations.

  • Manage and mentor a team of security professionals, fostering a proactive and vigilant security culture.

  • Policy and Protocols:Develop, implement, and enforce security policies and procedures tomaintaina secure environment.

  • Work closely with other departments to integrate security considerations into broader organizational initiatives.

  • Design and deliver training programs to educate employees on security protocols and best practices.

  • Technical Knowledge:Oversee the operation and maintenance of security systems, including access controls and surveillance systems.

  • Reporting and Investigations:Conduct thorough investigations into security incidents and provide detailed reports to senior management.

  • Regulatory Compliance:Stay informed about local security regulations and ensure all security practicescomply withrelevant laws and standards.

What We're Looking For

  • Proven history in security management and incident oversight within a corporate setting.

  • Skilled in providing and managing security solutions through innovation and quality.

  • Interpersonal Skills:Ability tomaintainand develop positive working relationships with stakeholders and end-users.

  • Operational Expertise:Proficient in operational security management, including leadership, team management, and incident response within a corporate environment.

  • Sound interpersonal and communication skills, with experience in issue and conflict resolution.

  • Ability to work under own initiative,demonstratingstrong work ethics and decision-making capability.

  • Technical Proficiency:Competent in Microsoft Word, Excel, Outlook, and PowerPoint.

  • System Knowledge:Familiarity with security systems such as access controls, camera surveillance systems, and security software platforms.

Expected Base Pay Range (USD)

110,450 - 165,500, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.


Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

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משרות נוספות שיכולות לעניין אותך

08.05.2025
M

Marvell Senior Staff Design Verification India, Karnataka, Bengaluru

Limitless High-tech career opportunities - Expoint
Lead and mentor a strong SOC design team across multiple geographies. Work closely with various stakeholders to architect and design high quality SOC designs. Lead the SOC design team by...
תיאור:
As part of SOC Design leadership, you will play a key role in building complex multi-chiplet SOCs for CCS product portfolio.

What You Can Expect

  • Lead and mentor a strong SOC design team across multiple geographies.
  • Work closely with various stakeholders to architect and design high quality SOC designs.
  • Lead the SOC design team by being hands-on with RTL coding, IP integration flows and drive quality and methodology improvements.
  • Define, track and drive project execution timelines and milestones working closely with various stakeholders and program management for successful product execution.
  • Define the system architecture, micro-architecture and register specification for highly complex SoCs and participate in specification writeup
  • Work with the physical design teams, providing guidance and support in floorplanning, power analysis, synthesis and timing signoff through reviews and design changes
  • Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip simulation and emulation, performance and power analysis and debug.
  • Work with third party vendors to define customization requirements of third party IPs (controller, PHY, etc.)
  • Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers.
  • Recruit, retain, and develop top engineering talent.

What We're Looking For

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 15+ years of related professional experience or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 10+ years of experience.
  • 10+ years of experience in design engineering with focus on SOC design, integration and verification.
  • Proven track record of managing technical teams and leading cross-functional teams across multiple geographies
  • Extensive and deep knowledge of SOC design components and interconnects, including clock, reset, design-for-test and design-for-debug features, IP integration and boot and security requirements
  • Hands on experience with RTL Coding and methodologies, IP integration flows, design quality tools .
  • Working knowledge in one or more of the following: Processor architecture, IO protocols (PCIe, CXL, Ethernet) and memory technologies interfaces (DDR, HBM)
  • Cross domain knowledge to resolve SOC issues with design, DFT, Synthesis, Physical design, STA team.
  • Strong experience in coding in scripting languages like Perl, Python, Tcl & UNIX Shell etc
  • Strong understanding of product development cycle of large SOCs through multiple successful product tape-outs.

Expected Base Pay Range (USD)

180,670 - 270,700, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.


Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

Show more

משרות נוספות שיכולות לעניין אותך

24.04.2025
M

Marvell Senior Staff Design Verification India, Karnataka, Bengaluru

Limitless High-tech career opportunities - Expoint
As a Senior Staff Test Engineer, you will be responsible for test program development for characterization, production, and wafer sort on Advantest 93K and/or Teradyne UltraFLEX tester platform(s). Design tester...
תיאור:

What You Can Expect

Marvell is looking for highly motivated, talented Senior Staff Test Engineer. You will part of a dynamic NPI product engineering team working on most advanced technologies including AI Compute, Server & Network Processors. Working at Marvell is fun, exciting, and has a lot of growth potential within the company. You will work closely with Product, Hardware, Design and Firmware engineering teams to design, develop, and debug products and solutions.

  • As a Senior Staff Test Engineer, you will be responsible for test program development for characterization, production, and wafer sort on Advantest 93K and/or Teradyne UltraFLEX tester platform(s).

  • Design tester hardware for high-speed testing.

  • Create all the documentation for detail test plans and test methodologies to meet product specifications.

  • Involve in the testability review with DFT/DFM teams to define and enhance yield and test methodologies.

  • Test pattern conversion from design simulation environment to ATE format.

  • Play a lead role in test flow optimization, test time reduction, insertion removals, yield improvement, and release of production test programs with product engineers.

What We're Looking For

  • Bachelor’s degree in Electrical Engineering or related fields and 5 years of related professional experience.

  • Master's degree in Electrical Engineering or related fields with 3 years of experience.

  • Minimum 5+ years of test program development experience on the Advantest 93K and/or Teradyne UltraFLEX ATE tester platform(s).

  • Demonstrable experience in ATE testing (critical skill), test methodology, silicon process, DFT/DFM, and high-speed digital testing experience required.

  • Strong knowledge of C/C++, Perl, Python, and Linux environment.

  • Must have effective interpersonal, teamwork, and communication skills.

  • Excellent problem solving, teamwork, collaboration and interpersonal skills.

  • Have an inherent sense of urgency and accountability.

  • Must have the ability to multi-task in a fast-paced environment.

Expected Base Pay Range (USD)

115,790 - 173,500, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.


Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

Show more

משרות נוספות שיכולות לעניין אותך

Limitless High-tech career opportunities - Expoint
Provide co-design support with both ESD simulations of circuits to maximize both performance and ESD protection robustness. Perform ESD design reviews and provide the required technical guidance for analog, foundational...
תיאור:
As a Digital IC Design Senior Staff/Principal Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be playing a crucial role in establishing ESD requirements and validating ESD solutions for Foundational IP, SerDes IP, and SOCs during the ESD qualification process. You will work closely with the Physical Design, Electrical Engineering, and SOC (System on Chip) teams to provide support from the initial design phase through failure analysis, issue root cause determination, and the development of corrective actions. Being part of interface design team, you will have opportunities for the development of IO circuit to customer specifications including the generation and delivery of final EDA views for the IP. Typical circuits to be developed include biasing blocks,protection circuits, regulators, amplifiers, switches, and a range of closed loop feedback circuits.


What You Can Expect

  • Provide co-design support with both ESD simulations of circuits to maximize both performance and ESD protection robustness.
  • Perform ESD design reviews and provide the required technical guidance for analog, foundational IP, SOCs, and qualification test chips for multiple technology nodes ranging from 45nm to 2nm across major foundry platforms.
  • Validate and characterize ESD circuits using ICV PERC, Calibre PERC, TLP-based SPICE simulation, and any other industry methods and tools.
  • Design enablement of ESD protection schemes for analog design like SerDes. This will include understanding ESD protection design, latch-up, transient latch-up as well as ESD design verification and EDA tools.
  • Continue the development of “best practices” for ESD in the technologies being supported.
  • Development and support of EDA tools for ESD design checking.
  • Development of circuits like Driver, Receiver, Overvoltage protection circuits, Fail safe I/O, Bandgap and Voltage Regulators.

What We're Looking For

  • Bachelor’s or Master’s degree and/or PhD inElectrical/ElectronicEngineering, Microelectronics or related fields and 8-15 years of related professional experience.
  • Expertise in custom circuit design, handling layout effect in advanced FinFET process design rules, process variability and circuit reliability issues that affect power, speed, area, and yield.
  • Advanced knowledge of on-chip ESD protection circuit design
  • Advanced knowledge of CAD design tools such as Cadence and SPICE
  • Applicant should have sufficient design experience to be able to effectively review designs and communicate ESD design deficiencies to product design engineering.
  • Advanced knowledge of ESD relevant device physics such as snapback and other high-level injection phenomenon/device operations
  • Fully familiar with industry ESD test standards and latest developments.
  • Experience with verifying ESD analysis for IP and SoC level using industry standard tools and methodologies.
  • Exposure and experience with the Custom ESD PERC code development will have added advantage to this role.
  • Experience with simulation skills using cadence including PEX, Monte Carlo, and Corner analysis.
  • Derive design specifications from customer requirement.
  • Requires effective communication between multiple sites and ability to work with multiple groups.

Show more
בואו למצוא את עבודת החלומות שלכם בהייטק עם אקספוינט. באמצעות הפלטפורמה שלנו תוכל לחפש בקלות הזדמנויות Staff Engineer - Dft בחברת Marvell ב-India, Bengaluru. בין אם אתם מחפשים אתגר חדש ובין אם אתם רוצים לעבוד עם ארגון ספציפי בתפקיד מסוים, Expoint מקלה על מציאת התאמת העבודה המושלמת עבורכם. התחברו לחברות מובילות באזור שלכם עוד היום וקדמו את קריירת ההייטק שלכם! הירשמו היום ועשו את הצעד הבא במסע הקריירה שלכם בעזרת אקספוינט.