

Microcode Development
Architecture & Design
Verification & Testing
Optimization & Performance
You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, and internships experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying topcandidates.
Minimum Qualifications
Preferred Qualifications
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:משרות נוספות שיכולות לעניין אותך

As a Senior Principal Engineer, you will architect and develop embedded software that directly interfaces with hardware components, including microcode, IP-specific firmware, FPGAs, and DSPs. You will play a critical role in defining the firmware architecture, partitioning functionality between hardware and software, and driving co-validation strategies. This role requires deep technical expertise, strategic vision, and the ability to influence cross-functional teams across silicon, platform, and software domains.
Key Responsibilities:
Minimum Qualifications
Preferred Qualifications:
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
Key Responsibilities:
Lead the architecture, design, and validation of SERDES IP blocks across multiple generations of Intel process technologies.
Guide the team through all phases of development: specification, design, verification, silicon bring-up, and productization.
Ensure compliance with industry standards (e.g., IEEE 802.3, OIF CEI) and internal quality metrics.
Build and mentor a high-performing team of analog/mixed-signal engineers.
Foster a culture of innovation, accountability, and continuous improvement.
Build and lead a global team.
Work closely with SoC design, packaging, validation, and manufacturing teams to ensure seamless integration of SERDES IP.
Partner with customer engineering and product teams to translate customer requirements into technical deliverables
Own project schedules, deliverables, and risk mitigation plans.
Drive execution excellence and ensure timely delivery of IP to internal and external customers.
Required Experience:
Proven leadership experience managing technical teams.
Excellent communication and stakeholder management skills.
Familiarity with a variety of EDA tools
Strong understanding of semiconductor device physics and process technologies.
Preferred Skills
Experience with advanced packaging and signal/power integrity.
MS or PhD in Electrical Engineering or related field.
10+ years of experience in analog/mixed-signal IC design, with a focus on SERDES.
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
Who You Are
Responsibilities include but are not limited to:
Designs, develops, and builds custom digital circuits for a CPU, including memory and caches.
Designs floorplans, performs circuit design, schematic entry, simulation for CPU blocks, and verify functionality to optimize custom circuit for CPU power, performance, area, timing, and yield goals.
Creates block level DFT models, develops memory test tools, and improves and automates flows and methodologies to ensure streamlining of design.
Collaborates cross functionally to report design progress and to collect, track, and resolve any performance and CPU design issues.
Optimizes performance, power, and area, reduces leakage of CPU circuits, and drives characterization of individual memory instances and memory compilers.
Works with CPU architecture and layout teams to design circuits for best functionality, robustness, and electrical capabilities.
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
Master's Degree in Electrical Engineering and/or Computer Engineering or any STEM related degree with 3+ years of relevant experience -OR- PhD in Electrical Engineering and/or Computer Engineering or any STEM related degree with 2+ years of relevant experience
2+ years of work experience in the following areas:
Complementary MOS (CMOS) circuits design. Digital logic and optimization.
Circuit design trade-off for power, performance and area.
Very Large-Scale Integration (VLSI).
Low power implementation techniques.
Memory design experience.
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
Power/Performance/Areaconstraints
Your responsibilities are as follows but not limited to:
Designs, develops, and builds custom digital circuits for a CPU, including memory and caches.
Designs floorplans, performs circuit design, schematic entry, simulation for CPU blocks, and verifies functionality to optimize custom circuit for CPU power, performance, area, timing, and yield goals.
Creates block level DFT models, develops memory test tools, and improves and automates flows and methodologies to ensure streamlining of design.
Collaborates cross functionally to report design progress and to collect, track, and resolve any performance and CPU design issues.
Optimizes performance, power, and area, reduce leakage of CPU circuits, and drives characterization of individual memory instances and memory compilers.
Works with CPU architecture and layout teams to design circuit for best functionality, robustness, and electrical capabilities.
You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications
Master's Degree in Electrical Engineering and/or Computer Engineering or any STEM related degree with 4+ years of experience in a high-tech company -OR- PhD in electrical engineering and/or computer engineering or any STEM related degree with 2+ years of experience in a high-tech company.
Preferred Qualifications
Experience in Complementary MOS (CMOS) circuits design
Experience in Digital logic and optimizations. Circuit design trade-off for power, performance and area
Experience in Very Large-Scale Integration (VLSI)
Experience in Low power implementation techniques
Experience in Memory design experience
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:

Who You Are
This role is in the Silicon Engineering Group as a Power Analysis and Optimization Engineer. Your responsibilities will include, but not limited to:
Working cross-functionally with design and architecture teams to define targets and convergence methodology.
Identifying opportunities for power optimization in existing design, and new power saving features.
Defining power optimization solutions and driving optimizations that advance the state of art in power and efficiency.
Designing, developing, and executing power plans for the CPU.
Conducting feature and workload analysis from power standpoint and driving to close any
gaps between observed behavior and targets on CPUs in development.
Providing recommendations for future architecture.
Developing and enhancing innovative flows for power analysis.
Ensuring CPUs are optimized for power.
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
The candidate must have a bachelor's degree in electrical/computer engineering, and/or computer science with 4+ years of experience -OR- Master's degree in electrical/computer engineering and/or computer science with 3+ years of experience -OR- a PhD in electrical/computer engineering and/or computer science
At least 4 years of experience in dynamic and leakage power estimation and reduction atarchitecture/RTL/blocksynthesis and circuit design level.
Preferred Qualifications
Master's degree in electrical/computer engineering and/or computer science with 3+ years of experience; OR a PhD in electrical/computer engineering and/or computer science with 2+ years of experience in the following:
Proficiency with industry-standard power estimation tools.
Automation skills in a scripting language.
Broad understanding of the overall CPU architecture.
Chip/CPU level understanding required on power consumption, power estimation and low power design methods.
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Who You Are
This role is in the CPU Circuit Design Engineer. Your responsibilities will include, but are not limited to:
Designs, develops, and builds custom digital circuits for a CPU, including memory and caches.
Designs floorplans, performs circuit design, schematic entry, simulation for CPU blocks, and verify functionality to optimize custom circuit for CPU power, performance, area, timing, and yield goals.
Creates block level DFT models, develops memory test tools, and improves and automates flows and methodologies to ensure streamlining of design.
Collaborates cross functionally to report design progress and to collect, track, and resolve any performance and CPU design issues.
Optimizes performance, power, and area, reduce leakage of CPU circuits, and drives characterization of individual memory instances and memory compilers.
Works with CPU architecture and layout teams to design circuit for best functionality, robustness, and electrical capabilities.
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
Master's Degree in Electrical Engineering and/or Computer Engineering or any STEM related degree -OR- Bachelor's Degree in Electrical Engineering and/or Computer Engineering or any STEM related degree with 1+ years of experience in a high-tech company and experience in the following areas:
Complementary MOS (CMOS) circuits design
Digital logic and optimization
Circuit design trade-offs for power, performance and area.
Very Large-Scale Integration (VLSI)
Preferred Qualifications
Memory design experience
Low power implementation techniques
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Microcode Development
Architecture & Design
Verification & Testing
Optimization & Performance
You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, and internships experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying topcandidates.
Minimum Qualifications
Preferred Qualifications
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:משרות נוספות שיכולות לעניין אותך