דרושים Layout / Design Automation Student Worker ב-אינטל ב-Mexico, Guadalajara

You will be part of a team participating in the design of a future generation high performance Intel Atom microprocessors.

Also, you will drive physical implementation for a range of memory compilers, custom IPs, and partitions in support of CPU products. The work is performed with broadly defined parameters and assignments are often complex and nonstandard in nature.

Your responsibilities will include but not be limited to:

• Ensure all designs are following the best practices and are highly efficient.
• Independently perform and drive complex physical design assignments.
• Work closely with circuit design engineers to interpret schematics and drive physical implementation.
• Experience ranging from leaf level cell design to integration is desired.
• Collaborate closely with other SoC projects at various sites across Intel.
• Willingness to develop layout scripts macros and solutions is a plus.

The ideal candidate should exhibit the following behavioral traits:

• Excellent communication and interpersonal skills.
• Prioritization and multitasking skills.
• Good analytical and problem-solving skills.

Minimum qualifications are required to be initially considered for this position,

• Candidate must possess a bachelor’s in electronic, Microelectronic Engineering, Computer Engineering, or a related engineering discipline.
• 6+ months of experience in Layout design.
• Advanced English level.

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates,

• Master's degree inelectronic/MicroelectronicEngineering, Computer Engineering, or a related engineering discipline.
• 1+ year of experience or familiarity with Very Large Scale of Integration (VLSI) and ComplementaryMetal-Oxide-Semiconductor(CMOS) logic circuit design.
• 1+ year of knowledge in Unix/Linux operating systems.vcg cxzazxcV CXSAZ

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or

You will be part of a team participating in the design of a future generation high performance Intel Atom microprocessors.

Also, you will drive physical implementation for a range of memory compilers, custom IPs, and partitions in support of CPU products.

The work is performed with broadly defined parameters and assignments are often complex and nonstandard in nature.

Your responsibilities will include but not be limited to:

• Ensure all designs are following the best practices and are highly efficient.
• Independently perform and drive complex physical design assignments.
• Work closely with circuit design engineers to interpret schematics and drive physical implementation.
• Experience ranging from leaf level cell design to integration is desired.
• Collaborate closely with other SoC projects at various sites across Intel.
• Willingness to develop layout scripts macros and solutions is a plus.

The ideal candidate should exhibit the following behavioral traits:

• Excellent communication and interpersonal skills.
• Prioritization and multitasking skills.
• Good analytical and problem-solving skills.

Minimum qualificationsare required to be initially considered for this position:

• Candidate must possess a bachelor's in electronic, Microelectronic Engineering, Computer Engineering, or a related engineering discipline.
• 6+ months of experience in layout design.
• Advanced English level.

Preferred qualificationsare in addition to the minimum requirements and are considered a plus factor in identifying top candidates:

• Master's degree inelectronic/MicroelectronicEngineering, Computer Engineering, or a related engineering discipline.
• 1+ year of experience or familiarity with Very Large Scale of Integration (VLSI) and ComplementaryMetal-Oxide-Semiconductor(CMOS) logic circuit design.
• 1+ year of knowledge in Unix/Linux operating systems.

The ideal candidate should exhibit the following behavioral traits:

• Advanced English communications skills.
• Strong leadership skills.

Minimum qualificationsare required to be initially considered for this position.

• Bachelor's degree in electrical engineering, computer engineering, or related field.
• 6+ years of total experience in Analog or Mixed Signal or Memory layout design.
• 3+ years of experience in Leadership roles.
• Advanced English level.

Must have unrestricted - permanent right to work in Mexico.

The position is in Mexico; it is not eligible for employment-based visa/immigration sponsorship.

Preferred qualificationsare in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• Master's degree in Electrical engineering, Computer engineering, or related field.
• EDA Tools specifically Virtuoso EXL.
• People and Technical Management experience.
• Multiple Tape-out experience including 2+ tape-outs in advanced technologies.
• Knowledge of VLSI design.

Designs and optimizes custom physical layouts for analog, mixed-signal, and memory circuits in CMOS technology, ensuring performance, area, and reliability goals are met.

Your responsibilities will include but not limited to:

• Plan, design, and validate highly customized physical layouts using Virtuoso XL.
• Collaborate with circuit designers to meet functional and performance specs.
• Leverage best-known methods to create high-quality layouts efficiently.

The ideal candidate should exhibit the following behavioral traits:

• Advanced problem-solving skills, collaboration, and team skills.
• Strong problem-solving and teamwork skills.

Minimum qualificationsare required to be initially considered for this position.

• Bachelor's degree in electrical engineering, computer engineering, or related field.
• Intermediate to advanced English level.

3+ years in any of the following:

• Device-level CMOS analog/memory custom layout design.
• Hierarchical layout floorplan and integration
• Proficient in EDA tools, DRC/LVS, and CMOS process.
• Experience with basic integrated circuit operation.
• Experience in Unix environment.

Must have unrestricted - permanent right to work in Mexico.

The position is in Mexico; it is not eligible for employment-based visa/immigration sponsorship.

Preferred qualificationsare in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• Experience with advanced process nodes.
• ICC, Fusion compilers, and ICWBEV+.
• Scripting experience (Python, SKILL) for automation.
• Berkely Analog Generator.
• Knowledge of VLSI design.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or

Designs and optimizes custom physical layouts for analog, mixed-signal, and memory circuits in CMOS technology, ensuring performance, area, and reliability goals are met.

Your responsibilities will include but not limited to:

• Plan, design, and validate highly customized physical layouts using Virtuoso XL.
• Collaborate with circuit designers to meet functional and performance specs.
• Leverage best-known methods to create high-quality layouts efficiently.

The ideal candidate should exhibit the following behavioral traits:

• Advanced problem-solving skills, collaboration, and team skills.
• Advanced English communication skills.

Minimum qualificationsare required to be initially considered for this position.

• Bachelor's degree in electrical engineering or related field.

6+ months of experience working with any of the following

• EDA tools, DRC/LVS, and CMOS process.
• Design hierarchy, hierarchical layout integration, using fill to meet design rules in a block, and layout floorplan.
• Basic integrated circuit operation.
• Unix environment.

Must have unrestricted - permanent right to work in Mexico.

The position is in Mexico; it is not eligible for employment-based visa/immigration sponsorship.

Preferred qualificationsare in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

2+ years of experience working with:

• Device-level CMOS analog/memory custom layout design. Experience with advanced process nodes.
• ICC, Fusion compilers, and ICWBEV+
• Scripting skills (Python, SKILL) for automation.
• Berkely Analog Generator.
• Knowledge of VLSI design.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.

Be part of the Validation, Integration and Debug Engineering team within Network and Edge Group, which validates at the unit, product, and system level the latest solutions for Telecommunications.

• This position is for a student interested in test automation, applied to hardware validation.
• The role is going to assist with Linux system administration and automation of test content and reports.
• The selected candidate will be working in an Agile-Led team, also involved on system setup and CI/CD activities.

Minimum Qualificationsare required to be initially considered for this position.

• Candidate must be currently pursuing a bachelor's in electrical engineering, Computer Engineering, Computer Science, or a related STEM field (At least 12 months remaining as an active student).
• 3+ months of experience with scripting languages such as Python.
• 3+ months of experience with Linux OS, on any distribution.
• Intermediate English level.

The position is located in Mexico, it is not eligible for employment-based visa/immigration sponsorship.
Preferred Qualificationsare in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• Master's degree in electrical engineering, Computer Engineering, Computer Science, or a related Familiarized with version controllers (GitHub, SVN, GitLab, etc.).

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.

You will be part of a team participating in the design of a future generation high performance Intel Atom microprocessors. Also, you will drive physical implementation for a range of memory compilers, custom IPs, and partitions in support of CPU products.

The work is performed with broadly defined parameters and assignments are often complex and nonstandard in nature.

Your responsibilities will include but not be limited to:

• Ensure all designs are following the best practices and are highly efficient.
• Independently perform and drive complex physical design assignments.
• Work closely with circuit design engineers to interpret schematics and drive physical implementation.
• Experience ranging from leaf level cell design to integration is desired.
• Collaborate closely with other SoC projects at various sites across Intel.
• Willingness to develop layout scripts macros and solutions is a plus.

The ideal candidate should exhibit the following behavioral traits:

• Excellent communication and interpersonal skills.
• Prioritization and multitasking skills.
• Good analytical and problem-solving skills.

Minimum qualifications are required to be initially considered for this position,

• Candidate must possess a bachelor's in electronic, Microelectronic Engineering, Computer Engineering, or a related engineering discipline.
• 6+ months of experience in layout design.
• Advanced English level.

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates,

• Master's degree inelectronic/MicroelectronicEngineering, Computer Engineering, or a related engineering discipline.
• 1+ year of experience or familiarity with Very Large Scale of Integration (VLSI) and ComplementaryMetal-Oxide-Semiconductor(CMOS) logic circuit design.
• 1+ year of knowledge in Unix/Linux operating systems.