דרושים Validation Automation Architect ב-אינטל ב-מלזיה

• Translates product requirements into package architecture specification, drives end-to-end package solutions for physical, electrical, and cost requirements.
• Leads technology tradeoff decisions ensuring silicon packages conform to electrical, mechanical, thermal, and reliability standards, specifications, and landing zones.
• Collaborates with silicon, hardware, and package leads to ensure high quality package output and aids in removing roadblocks.
• Oversees end-to-end package development process, including design, processes, and procedures and continuously improves packaging quality standards and targets.
• Applies expertise in package design troubleshooting, resolves new and existing packaging problems involving designs, materials, and processes and provides innovative and cost-effective solutions.
• Collaborates with manufacturing team to ensure the packaging design and tape-out seamlessly transition to production.

• Bachelor Degree in relevant engineering/science domain with minimum 10 years of experience in the package design and/or architecture.
• Prior leadership role in package technology readiness development, design tape-out and/or innovation.

• Translates product requirements into package architecture specification, drives end-to-end package solutions for physical, electrical, and cost requirements.
• Leads technology tradeoff decisions ensuring silicon packages conform to electrical, mechanical, thermal, and reliability standards, specifications, and landing zones.
• Collaborates with silicon, hardware, and package leads to ensure high quality package output and aids in removing roadblocks.
• Oversees end-to-end package development process, including design, processes, and procedures and continuously improves packaging quality standards and targets.
• Applies expertise in package design troubleshooting, resolves new and existing packaging problems involving designs, materials, and processes and provides innovative and cost-effective solutions.
• Collaborates with manufacturing team to ensure the packaging design and tape-out seamlessly transition to production.

• Bachelor Degree in relevant engineering/science domain with minimum 10 years of experience in the package design and/or architecture.
• Prior leadership role in package technology readiness development, design tape-out and/or innovation.

• Defines and drives critical power and performance requirements and analysis of microbenchmarks and full end to end solutions on competitive platforms.
• The role will require to understand performance implications of various use cases on competitive platforms to provide product positioning and inform future Intel architecture. These use cases may include CPU, Gfx, AI, and End-to-end solutions. The role will involve running microbenchmarks that are CPU, Gfx, or AI specific, collecting data, and analyzing the performance.
• The role will include developing potential methods to analyze platform power and performance, important use cases, and relevant workloads to identify power and performance bottlenecks and opportunities.
• Collaborates with architecture, design, and validation teams to provide platform power and performance analysis to project to set performance targets, drive power and performance methodology, and benchmarking for competitive platform using relevant workloads.

In this role you will be shaping the future of computing. We bring innovative technologies to the most complex microprocessor and SoC products on the planet. You will be working in a team developing new and creative methods to increase efficiency and reduce time to market for these designs, helping to increase Intel's lead in computing. You will combine knowledge of logic and circuit design with software development techniques to deliver cutting edge solutions, shaping the way these products come to life. You will work with the best engineering talent in the world to collaborate on these new methods. You will play a pivotal role in our mission to revolutionize computing.

Your responsibilities will include but not be limited to:

• Deploying software tools to the design team, creating and delivering effective documentation and training, and providing support.

• Support and maintenance of design environment infrastructure components

• Automating design tasks in order to complete the product design in the most efficient fashion possible.

• Developing solutions to problems utilizing formal education and judgment.

Minimum Qualifications:

• You should have Bachelor/Master in Electrical or Electronic Engineering, Computer Engineering, Computer Science.

• Proficient in TCL, Perl or Python programming language.

• Unix/Linux knowledge

Additional Qualifications:

• Ability to work in a fast-paced, collaborative, and often intense project schedule.

• Excellent communication and interpersonal skills, a good team-player as well as able to work independently.

• Creative mind and self-motivated.

• Analytical problem solving and multitasking.

• Able to do pathfinding or research independently to find solutions.

• Computer architecture

• Digital logic

• VLSI layout

• Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.

• Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.

• Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.

• Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.

• Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.

• Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.

• Optimizes CPU design to improve product level parameters such as power, frequency, and area.

• Participates in the development and improvement of physical design methodologies and flow automation.

Candidate must have aBachelor's degree inElectronic/Electrical/ComputerEngineeringwith
5+ years of experiencein :

• Deep understanding of most, if not all Physical Design and Verification Tools, Flows and Methods used in VLSI back-end custom-transistor based designs.

• Expertise using industry standard Engineering Design Automation (EDA) VLSI tools from 1 or more of Synopsys, Cadence and/or Mentor Graphics in one of more of the following areas of: STA, Power, ECO, LVS, Power-rail integrity, Noise and/or ERC flows.

• Deep understanding and experience of signoff aspects in STA for timing closure (OCV, constraints, parasitics), LVS, Static Power Analysis or Signal integrity analysis (Noise, SI-crosstalk).

• Familiar with digital custom circuit transistor-level designs and topologies including dynamic circuit techniques and memories as well as SPICE models and netlists.

• Desire to deep-dive into timing paths, perform QOR difference analysis and identify key issues.

• Expertise with Linux environments and basic shell scripting.

• Expertise is a must in 1 or more scripting languages such as Python, Perl and/or Tcl.

• Knowledge in standard-cell liberty format syntax and digital circuit device-level SPICE modelling.

• Knowledge in standard formats from 1 or more of transistor-level netlist, standard parasitic formats and/or SDC constraints.

• EDA tool API coding.

• Experience with advanced programming data structures.

Main responsibility is to drive and execute validation qualification processes across platforms to uncover and debug test and silicon bugs.

This encompasses:

• Run custom designed test content to qualify feature functionality and perform failure triage

• Analyze execution data and performance monitors to optimize the running of test content suites and to gauge product health in the shortest amount of time

• Set up validation systems and debug/isolate system/platform issues

• Tune/optimize system hardware and software parameters to improve validation efficiency

• Develop scripts and indicators to improve product validation efficiency and effectiveness

• Bachelor's, Master's or a Ph.D. in Computer Engineering, Computer Science orElectrical/ElectronicsEngineering.

• Preferably with experience in system/post-silicon validation, test development or silicon design.

• Knowledge/experience in CPU architecture, computer system or CPU features, C/C++programming/Python/Perlor any other form of scripting.

• Experienced in embedded systems or debug tools and platform debug is an added advantage.

Main responsibility is to drive and execute validation qualification processes across platforms to uncover and debug test and silicon bugs. This encompasses:

• Analyze execution data and performance monitors to optimize the running of test content suites and to gauge product health in the shortest amount of time

• Tune/optimize system hardware and software parameters to improve validation efficiency

• Design and develop an automation tool stack that will streamline our validation process and improve the product quality of next-gen Intel Core

• Apply data analytics and machine learning techniques to analyze and enhance next-gen Intel Core product validation coverage

• Collaborate with cross-functional teams to integrate automation tools into our product development and validation workflow.

• Bachelor or Master in Computer Engineering, Computer Science orElectrical/ElectronicsEngineering

• Preferably with experience in software development and strong interests in PC architecture.

• C or C++ or C# or Perl of Python programming.

• Database and web programming will be a plus.

• Basic knowledge/experience in CPU architecture and features, computer system and validation will be an added advantage.