מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר
דרושים Hw/sw Power Management Engineering Program Manager ב-אפל ב-United States, Beaverton
מצאו את ההתאמה המושלמת עבורכם עם אקספוינט! חפשו הזדמנויות עבודה בתור Hw/sw Power Management Engineering Program Manager ב-United States, Beaverton והצטרפו לרשת החברות המובילות בתעשיית ההייטק, כמו Apple. הירשמו עכשיו ומצאו את עבודת החלומות שלך עם אקספוינט!
חברה (1)
אופי המשרה
קטגוריות תפקיד
שם תפקיד (1)
United States
אזור
Beaverton
נמצאו 15 משרות
29.06.2025
A
Apple SoC Power Flow Methodology Engineer United States, Oregon, Beaverton
A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience. Good understanding of VLSI designs and SOC design flows. Strong passion...
תיאור:
As a Power Flow Methodology Engineer, you’ll deliver new automated solutions and capabilities for the Silicon Engineering Power team to build chips that are more power efficient than ever before. You will help with the architecture, implementation, and verification of new low-power design and verification flows and help to craft the low-power methodologies across a wide variety of future technologies. The work involves creating flows and tools related to power analysis, optimization and verification which may be run as part of RTL construction/verification, synthesis, or P&R.Additional responsibilities include communicating with the design team to answer questions about the materials and drive issues to resolution.
- A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience
- Good understanding of VLSI designs and SOC design flows.
- Strong passion for scripting and applying low-power domain-specific knowledge to create new software solutions.
- Strong background with flow development and/or object-oriented language algorithm design such as Python / C++ / Java.
- Solid understanding and proven track record using modern software testing and development practices.
- Good written/verbal communications skills are required.
- Knowledge of Tcl / Perl, experience with EDA tools, GUI development, and/or low-power concepts such as UPF and low-power design is a plus.
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משרות נוספות שיכולות לעניין אותך
08.06.2025
A
Apple HW/SW Interface Software Engineer United States, Oregon, Beaverton
Experience in C++ and Python. Experience with software engineering best practices (e.g., unit testing, version control, CI integration). Experience with hardware development fundamentals and chip design concepts. Minimum BS and...
תיאור:
In this highly visible and cross-functional role, your responsibilities will include:- Defining and evolving an IP-XACT-compatible register description format.- Designing, developing, and maintaining robust, scalable, and intelligent HW/SW interface tools and infrastructure.
- Experience in C++ and Python
- Experience with software engineering best practices (e.g., unit testing, version control, CI integration)
- Experience with hardware development fundamentals and chip design concepts
- Minimum BS and 10+ years of relevant industry experience
- Experience with IP-XACT, SystemRDL, or other hardware register description standards
- Comfortable developing in macOS and Linux environments
- Familiarity with CI/CD pipelines and automated build systems
- Proven ability to work collaboratively across hardware and software teams
- Strong communication skills and ability to articulate technical and architectural concepts
- Understanding of RTL development and design verification methodologies
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משרות נוספות שיכולות לעניין אותך
07.06.2025
A
Apple CPU Debug Power Management Microarchitect/RTL Engineer United States, Oregon, Beaverton
Minimum BS and 10+ years of relevant industry experience. Experience with Verilog or VHDL. Experience with simulators and waveform debugging tools. Experience with logic design with timing and power implications....
תיאור:
As a CPU Debug and Power Management Microarchitect/RTL Engineer, you will own or contribute to the following:• RTL ownership of CPU debug, trace, power management, clock management, and timer logic - development, assessment, and refinement of RTL design to target power, performance, area and timing goals• Micro-architecture development and specification - Work with a cross-functional team of silicon and software experts to explore and define architectural features, develop micro-architectural details, and arrive at a detailed specification• Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification• Performance exploration and correlation - explore high performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance• Design delivery - Aid in debug of issues at SoC level related to CPU power management, clock control, and debug features. Work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power
- Minimum BS and 10+ years of relevant industry experience
- Experience with Verilog or VHDL
- Experience with simulators and waveform debugging tools
- Experience with logic design with timing and power implications
- Knowledge and understanding of microprocessor architecture
- Expertise in one or more of the following areas: multiple clock/power domains and power management strategies, hardware debug and trace capabilities, DFT strategies, interrupt controllers, memory subsystem queuing, scheduling - starvation and deadlock avoidance, fabric communication protocols and interconnects
- SRAM design basics
- Understanding of low power microarchitecture techniques
- Understanding of high-performance design techniques and trade-offs
- Experience in C or C++ programming
- Experience using an interpretive language such as Python or Perl
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משרות נוספות שיכולות לעניין אותך
07.06.2025
A
Apple SoC Silicon Debug Engineering Program Manager United States, Oregon, Beaverton
SOC / VLSI Chip Design, Post Silicon Validation or Product Engineering experience. Post-silicon debug experience. Relevant technical program management, technical leadership or vendor management experience. BS and 3+ years relevant...
תיאור:
In this high profile role you will be responsible for the following:- Drive internal program process to guarantee high quality silicon execution- Focused issue reporting, bug tracking, and communication of program risks & status
- SOC / VLSI Chip Design, Post Silicon Validation or Product Engineering experience
- Post-silicon debug experience
- Relevant technical program management, technical leadership or vendor management experience
- BS and 3+ years relevant industry experience
- Top level SoC architecture and associated IPs knowledge
- Experience with ARM architecture and leading silicon projects from concept to production
- Possess extraordinary leadership skills and ability to encourage and influence team members with a dedication to see the big picture
- Proven track record of managing sophisticated, multifaceted schedules, driving improvements and lessons learned into organizational and team processes and methodologies
- Working knowledge of software development processes and methodologies
- Current knowledge of pre-si modeling platforms (FPGA, simulation, emulation)
- Ability to build effective working relationships across multi-functional partners, engineers and management
- Excellent spoken and written communication skills with the ability to tailor communication style to multiple audiences
- Strong multi-tasking and real-time crisis leadership skills
- Ability to understand and extract action plans from sophisticated technical discussions and translate into succinct messaging for multifunctional and executive status reporting
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משרות נוספות שיכולות לעניין אותך
07.06.2025
A
Apple CPU Debug Power Management Verification Engineer United States, Oregon, Beaverton
Minimum BS and 10+ years of relevant industry experience. Programming skills in Perl/Python or SystemVerilog. Experience in processor or power management architecture and verification. Experience with system fabric protocols such...
תיאור:
• You will work across the entire product lifecycle, from pre-silicon test planning to supporting post-silicon bring-up and debug when needed. This role is highly cross-functional, bridging CPU and SoC teams, and is critical to delivering robust, low-power, high-performance CPU designs.• Work closely with architecture and RTL designers on verifying the functionality correctness of CPU Power Management, clock control, and debug logic• Develop and execute test plans and schedules• Write and debug tests in Assembly, SystemVerilog, SVA, C++, and scripting languages to validate functionality in simulation, emulation, and FPGA environments• Build and maintain verification infrastructure, including checkers, transactors, and coverage monitors.• Analyze functional coverage to ensure test plan completeness• Identify, root-cause, and document design issues and collaborate with RTL teams to drive fixes• Support SoC-level debug for clock and power integration issues• Work with silicon bring-up teams to develop tests and debug issues across emulation, FPGA, and silicon. Contribute to post-silicon debug, using waveform and trace tools to diagnose complex system issues.
- Minimum BS and 10+ years of relevant industry experience
- Programming skills in Perl/Python or SystemVerilog
- Experience in processor or power management architecture and verification
- Experience with system fabric protocols such as AXI
- In-depth knowledge in design verification environments like random constraint verification and/or UVM base testbenches
- Experience in system Verilog assertions or silicon bringup or UPF and low power simulation
- Experience in processor debug features including hardware trace is a plus
- Experience with advanced verification techniques such as formal verification is a plus
- Advanced programming skills such as object orientated programming or CPU assembly language is a plus
- Should be an extraordinary teammate with excellent communication skills with the ability to articulate complex design issues during verification effort
- Be able to create and follow detailed work schedules and work independently on the verification efforts for a block/area of the design
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משרות נוספות שיכולות לעניין אותך
06.06.2025
A
Apple CPU Debug Power Management Microarchitect/RTL Engineer United States, Oregon, Beaverton
Minimum BS and 3+ years of relevant industry experience. Experience with Verilog or VHDL. Experience with simulators and waveform debugging tools. Experience with logic design with timing and power implications....
תיאור:
As a CPU Debug and Power Management Microarchitect/RTL Engineer, you will own or contribute to the following:• RTL ownership of CPU debug, trace, power management, clock management, and timer logic - development, assessment, and refinement of RTL design to target power, performance, area and timing goals• Micro-architecture development and specification - Work with a cross-functional team of silicon and software experts to explore and define architectural features, develop micro-architectural details, and arrive at a detailed specification• Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification• Performance exploration and correlation - explore high performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance• Design delivery - Aid in debug of issues at SoC level related to CPU power management, clock control, and debug features. Work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power
- Minimum BS and 3+ years of relevant industry experience
- Experience with Verilog or VHDL
- Experience with simulators and waveform debugging tools
- Experience with logic design with timing and power implications
- Knowledge and understanding of microprocessor architecture
- Expertise in one or more of the following areas: multiple clock/power domains and power management strategies, hardware debug and trace capabilities, DFT strategies, interrupt controllers, memory subsystem queuing, scheduling - starvation and deadlock avoidance, fabric communication protocols and interconnects
- SRAM design basics
- Understanding of low power microarchitecture techniques
- Understanding of high-performance design techniques and trade-offs
- Experience in C or C++ programming
- Experience using an interpretive language such as Python or Perl
Show more
משרות נוספות שיכולות לעניין אותך
19.05.2025
A
Apple SoC Power Spec Engineer United States, Oregon, Beaverton
A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience. We would prefer our SoC Power Spec Engineer to have the...
תיאור:
Your main responsibilities will be:
- A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience
- We would prefer our SoC Power Spec Engineer to have the following qualifications:
- MSEE preferred
- Deep knowledge of SOC architecture and power modeling.
- Deep understanding of SOC building blocks including CPU, GPU, caches, memory and media IPs
- Skills in scripting and data analysis.
- Understanding of VLSI design flow and CMOS technology and background in EE.
- Ability to understand and model thermal control loops and throttling mechanisms.
- Strong teammate with excellent communication skills.
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משרות נוספות שיכולות לעניין אותך
A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience. Good understanding of VLSI designs and SOC design flows. Strong passion...
תיאור:
As a Power Flow Methodology Engineer, you’ll deliver new automated solutions and capabilities for the Silicon Engineering Power team to build chips that are more power efficient than ever before. You will help with the architecture, implementation, and verification of new low-power design and verification flows and help to craft the low-power methodologies across a wide variety of future technologies. The work involves creating flows and tools related to power analysis, optimization and verification which may be run as part of RTL construction/verification, synthesis, or P&R.Additional responsibilities include communicating with the design team to answer questions about the materials and drive issues to resolution.
- A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience
- Good understanding of VLSI designs and SOC design flows.
- Strong passion for scripting and applying low-power domain-specific knowledge to create new software solutions.
- Strong background with flow development and/or object-oriented language algorithm design such as Python / C++ / Java.
- Solid understanding and proven track record using modern software testing and development practices.
- Good written/verbal communications skills are required.
- Knowledge of Tcl / Perl, experience with EDA tools, GUI development, and/or low-power concepts such as UPF and low-power design is a plus.
Show more
משרות נוספות שיכולות לעניין אותך
בואו למצוא את עבודת החלומות שלכם בהייטק עם אקספוינט. באמצעות הפלטפורמה שלנו תוכל לחפש בקלות הזדמנויות Hw/sw Power Management Engineering Program Manager בחברת Apple ב-United States, Beaverton. בין אם אתם מחפשים אתגר חדש ובין אם אתם רוצים לעבוד עם ארגון ספציפי בתפקיד מסוים, Expoint מקלה על מציאת התאמת העבודה המושלמת עבורכם. התחברו לחברות מובילות באזור שלכם עוד היום וקדמו את קריירת ההייטק שלכם! הירשמו היום ועשו את הצעד הבא במסע הקריירה שלכם בעזרת אקספוינט.