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מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר

דרושים Analog Ip Design Lead ב-אפל ב-Israel, Jerusalem

מצאו את ההתאמה המושלמת עבורכם עם אקספוינט! חפשו הזדמנויות עבודה בתור Analog Ip Design Lead ב-Israel, Jerusalem והצטרפו לרשת החברות המובילות בתעשיית ההייטק, כמו Apple. הירשמו עכשיו ומצאו את עבודת החלומות שלך עם אקספוינט!
חברה (1)
אופי המשרה
קטגוריות תפקיד
שם תפקיד (1)
Israel
Jerusalem
נמצאו 2 משרות
04.05.2025
A

Apple IP Layout Lead Israel, Jerusalem District, Jerusalem

Limitless High-tech career opportunities - Expoint
10+ years of experience in analog/mixed-signal layout design of deep sub micron CMOS circuits and at least 3+ years of recent experience on advance nodes including FinFet technologies. Experience crafting...
תיאור:
Senior Layout Leads are responsible for delivering Analog Mixed-Signal IP in an SOC flow. They collaborate with teams of highly skilled individuals to develop the next generation of world-leading SOCs.As a member of the AMS layout team you will be responsible to deliver Physical Design Verification clean layout, this includes the following: Crafting complex layout for mixed signal, and analog circuits in deep SubMicron CMOS technologies. Reviewing and analyzing floor-plans and complex circuits with circuit designers. Running complete set of design verification tools available on AMS blocks. Working with the circuit design team to plan/schedule work and negotiate any necessary layout trade-offs as needed. Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout. Exceeding engineering specifications and expectations by working closely with the circuit design team. Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements.
  • 10+ years of experience in analog/mixed-signal layout design of deep sub micron CMOS circuits and at least 3+ years of recent experience on advance nodes including FinFet technologies.
  • Experience crafting tight matching, low noise, and low power analog blocks, resistors, capacitors, pad IO's, ESD structures, etc.
  • High level of proficiency in custom and standard cell based floor-planning and hierarchical layout assembly.
  • Must understand issues of IR drop, RC delay, electro-migration, self heating and cross capacitance.
  • Must recognize failure prone circuit and layout structures, have experience with analog and DFM standard methodologies, and enthusiastically work with circuit designer for the best approach to problems.
  • High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc., reports.
  • Knowledge of MENTOR GRAPHICS or CADENCE layout tools.
  • Scripting skills in Perl, Python or SKILL an advantage.
  • Excellent interpersonal skills and ability to work with multi-functional teams.
Excellent EE Practical Engineers or Bachelors of Science (preferred)
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20.04.2025
A

Apple Analog IP Design Lead Israel, Jerusalem District, Jerusalem

Limitless High-tech career opportunities - Expoint
10+ years experience in analog IC design. Deep understanding of transistor device characteristics. Deep understanding of power, performance and area trade-off in mixed-signal designs. A proven track record of high-performance...
תיאור:
Defining and specifying requirements and circuit architecture for analog IP design, lab bring-up, characterization and debug, write specifications, test plans and characterization reports, supporting Apple system teams with product integration, work with chip design teams, system HW and SW design teams, ATE PEYou will be responsible for the following:1. Work with architecture team to define the IP microarchitecture spec. Refine the spec with reviews with other teams2. Develop the circuit design of the IP following established design guidelines based on microarchitecture spec. Own all aspects of circuit design development.3. Work and collaborate with other designers in the group to deliver results.4. Work with FE & BE teams to ensure quality analog integration5. Work with power/performance and functional verification team to define and validate operation sequences6. Work with multi-disciplinary teams to make sure designs are delivered on time and with highest quality by incorporating proper checks at every stage of the design process7. Work with post silicon validation groups to ensure the IP meets the power/performance targets
  • 10+ years experience in analog IC design.
  • Deep understanding of transistor device characteristics.
  • Deep understanding of power, performance and area trade-off in mixed-signal designs.
  • A proven track record of high-performance designs in high volume production for low power applications.
  • Knowledge of analog IC design flow and tools.
  • Strong communication skills are a must, as the candidate will interface with a lot of different groups within the company.
  • Excellent social skills and high degree of self interpersonal skills suited for working in a remote setting with team members across multiple time zones.
  • Hands-on design expertise in one or more of the following areas: High Speed, Low Power I/O Circuit Design: familiarity with PHY principles and concepts including forwarded clock topologies, training and calibration schemes etc.); High Speed Clock Path: low jitter distribution, DCD correction, phase shift (through delay lines or phase interpolation); Analog Front End: low noise and high-resolution signal conditioning prior to ADC and Op-Amp, switched-cap and continuous time filters, reference/bias generation, LDO etc.; Data Conversion: ADC and DAC subsystem. Different styles of data converters (ΔΣ, SAR, pipelined, SAR and flash) and associated calibration techniques.
  • Strong initiative and ownership of responsibilities, productive
  • Ability to work well in a team and be productive under tight schedules
  • Experience with advanced FinFET CMOS processes - an advantage
BS.c in Electrical EngineeringMS.c\ PhD - advantage
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משרות נוספות שיכולות לעניין אותך

Limitless High-tech career opportunities - Expoint
10+ years of experience in analog/mixed-signal layout design of deep sub micron CMOS circuits and at least 3+ years of recent experience on advance nodes including FinFet technologies. Experience crafting...
תיאור:
Senior Layout Leads are responsible for delivering Analog Mixed-Signal IP in an SOC flow. They collaborate with teams of highly skilled individuals to develop the next generation of world-leading SOCs.As a member of the AMS layout team you will be responsible to deliver Physical Design Verification clean layout, this includes the following: Crafting complex layout for mixed signal, and analog circuits in deep SubMicron CMOS technologies. Reviewing and analyzing floor-plans and complex circuits with circuit designers. Running complete set of design verification tools available on AMS blocks. Working with the circuit design team to plan/schedule work and negotiate any necessary layout trade-offs as needed. Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout. Exceeding engineering specifications and expectations by working closely with the circuit design team. Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements.
  • 10+ years of experience in analog/mixed-signal layout design of deep sub micron CMOS circuits and at least 3+ years of recent experience on advance nodes including FinFet technologies.
  • Experience crafting tight matching, low noise, and low power analog blocks, resistors, capacitors, pad IO's, ESD structures, etc.
  • High level of proficiency in custom and standard cell based floor-planning and hierarchical layout assembly.
  • Must understand issues of IR drop, RC delay, electro-migration, self heating and cross capacitance.
  • Must recognize failure prone circuit and layout structures, have experience with analog and DFM standard methodologies, and enthusiastically work with circuit designer for the best approach to problems.
  • High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc., reports.
  • Knowledge of MENTOR GRAPHICS or CADENCE layout tools.
  • Scripting skills in Perl, Python or SKILL an advantage.
  • Excellent interpersonal skills and ability to work with multi-functional teams.
Excellent EE Practical Engineers or Bachelors of Science (preferred)
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בואו למצוא את עבודת החלומות שלכם בהייטק עם אקספוינט. באמצעות הפלטפורמה שלנו תוכל לחפש בקלות הזדמנויות Analog Ip Design Lead בחברת Apple ב-Israel, Jerusalem. בין אם אתם מחפשים אתגר חדש ובין אם אתם רוצים לעבוד עם ארגון ספציפי בתפקיד מסוים, Expoint מקלה על מציאת התאמת העבודה המושלמת עבורכם. התחברו לחברות מובילות באזור שלכם עוד היום וקדמו את קריירת ההייטק שלכם! הירשמו היום ועשו את הצעד הבא במסע הקריירה שלכם בעזרת אקספוינט.