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Ip Micro Architect / Rtl Logic Design Lead jobs at Intel in India, Bengaluru
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Bengaluru
316 jobs found
Yesterday
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Intel Senior RTL Logic Design Engineer India, Karnataka, Bengaluru
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Review and participate in Specification reviews with architecture. Define architecture to achieve best in class KPIs for IP. Develop IP RTL. Define IP Design constraints (SDC). Perform the IP qualification...
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Yesterday
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Intel IP Micro Architect / RTL Logic Design Lead India, Karnataka, Bengaluru
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This role requires a unique blend of architectural expertise and hands-on RTL coding skills to bring cutting-edge designs to life. The ideal candidate will have a deep understanding of high...
Yesterday
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Intel GPU Technical Lead India, Karnataka, Bengaluru
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1) Applicants should have a B.Tech / M.Tech in Computer science / Electronics and Communications or Equivalent with 15+yrs of experience.2) Strong C/C++ programming skills with experience with modular software...
Yesterday
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Intel IP Verification Engineer India, Karnataka, Bengaluru
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Qualifications:Qualification :Master of Science (or a Master of Technology) degree in Electrical Engineering with more than seven years of relevant industry experience or a Bachelor of Science (Bachelor of Technology)...
Yesterday
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Intel Planning Data Enablement Lead - Business System Analyst India, Karnataka, Bengaluru
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Identifies business requirements, functional and system specifications that meet business user requirements, maps them to systems capabilities and recommends technical solutions. Configures system settings and options, plans and executes unit,...
Yesterday
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Intel SoC Design Verification Engineer India, Karnataka, Bengaluru
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Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the...
20.04.2025
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Intel SOC Floorplanning Lead India, Karnataka, Bengaluru
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Establishes the integration plans for die with optimization for package and board constraints. Bump planning, Die file generation , closing loop with package team on signal and power bump placement...
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Description:Full job details
Review and participate in Specification reviews with architecture. Define architecture to achieve best in class KPIs for IP. Develop IP RTL. Define IP Design constraints (SDC). Perform the IP qualification...
These jobs might be a good fit
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