Intel Structural Design Engineering Manager/Director 

India, Karnataka, Bengaluru 

967746504

Job Description

- Seeking a highly motivated engineer who can drive Layout Verification and TapeIn engagements for SoC Design.

- Experienced in digital implementation and tapeOut

- Industry Experience with Synopsys EDA tools in the IC digital sign-off flow and other state-of-Art Sign-off Tools.

- Experience in Physical Design and Physical Verification for block level and Top Level Designs

- Should be a known expert within the domain.

Qualifications

Preferred Qualifications:

- Requires a BS or MS in EE with 20+ years industry related experience in design and EDA with an emphasis on Physical Design and timing closure at 7nm or below nodes

- Strong Understanding of Technology

- Strong analysis skills required to debug complex physical verification problems.

- Proven track record and experience working in a fast paced environment with Multiple TapeOuts

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.