As a Memory Design Graduate Trainee, you will be part of Intel Design Enablement (DE) focused on pathfinding and development of advanced memory technology and circuits to enable best-in-class memory collateral/IP and product design across all generations of Intel process technology.As a member of this team, your responsibilities include (but not limited to):Memory pathfinding activities and power performance area (PPA) optimization through design technology co-optimization (DTCO); product/design enablement
Memory bitcell and complex periphery IC layout and automation
Memory array/IP design, memory circuit innovation, testchip design/execution/validation
Pre/post-Si validation/debug to enable yield and parametric tracking/rampMinimum Qualifications:
You should have Bachelor/Master/PhD in Electrical Engineering, Computer Engineering, Computer Science, or other related Electrical Scientific STEM field.
Proficient in TCL, Perl or Python programming language.
Unix/Linux operating systemPreferred Qualifications:
Creative mind and self-motivated.
Analytical problem solving and multitasking.
Able to do pathfinding or research independently to find solutions.We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits