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Qualcomm Physical Design Engineer 
India, Uttar Pradesh, Noida 
9637463

23.06.2024

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

Good hands-on experience on Floorplanning, PNR and STA flows

Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc

Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc

Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting

Principal Duties and responsibilities:

Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes.

Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc)

Quick learner with good analytical and problem solving skills

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Qualifications:

• 2+ years Hardware Engineering experience or related work experience.

• 2+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.