Microsoft Principal Silicon Debug Engineer 

Taiwan, Taoyuan City 

95171242

Required Qualifications:

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
  • OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
  • OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • OR equivalent experience.
• 5+ years of experience in product and test engineering, specialize in silicon debug or FA/FI
• 5+ years of experience building debug methodology solutions for complex state-of-the-art SoC in advance process nodes

Other Requirements:

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to, the following specialized security screenings:

• Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter

Preferred Qualifications:

• Proven debug track record on complex SoC
• Experience defining and coding debug tools
• Strong system-level debuggers with a background on debug tools and enough ATE/MFG exposure will be considered
• Experience with System-level debug and correlation to ATE
• Strong presentation and communication skills.
• Experience in
  • Leading cross functional teams and understands program/project management.
  • Managing supply chain, vendors / partners, and Integrated Circuit production.
  • Experience in system/customer requirements gathering and interfacing.
• Strong probability and statistics background including DOE’s.
• Knowledgeable in DFT and DFM techniques.
• Good understanding of bring-up/debug, characterization/manufacturing test (on ATEs).
• Ability to drive development and bring up test content on mixed signal IP’s is a plus.
• Device physics background.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
Microsoft will accept applications for the role until October 20, 2025.

• This is a senior technologist role that will guide Microsoft’s strategy and execution on silicon debug, FA/FI and debug tool readiness
• The candidate should have experience building end to end debug solutions: HW, SW, design collateral procurement, readiness for physical/electrical debug tools and physical FA readiness
• The position requires someone with experience in semiconductor debug, fault isolation, failure analysis and product engineering yield debug
• The candidate will be responsible for developing new silicon debug methodologies for all test content types in our MFG flow
• The candidate will also be responsible for root-cause of key product issues, circuit marginalities, special circuit failures and translate them into corrective actions in the design, our design methodologies and/or the MFG test flow
• Successful candidates have deep understanding and experience debugging product issues on ATE and using analytical equipment to isolate failures
• Deep understanding of best-in class silicon debug tools and methodologies is a must
• Successful candidates should have strong project leadership skills to manage external vendors, drive cross functional teams and drive sub-project as part of larger development programs