Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
5 years of experience in high-performance CPU or AI accelerator logic/RTL design/integration including microarchitecture definition and PPA optimizations.
Experience with a HDL language and front-end design methodology.
Experience with CPU, cache subsystem integration with SOC.
Experience with RTL static checks, like lint and CDC.
Preferred qualifications:
Experience with ARM Instruction Set Architecture.
Experience with SOC design, architect, and integration.
Experience with real-time operating systems (e.g. Android).
Experience with DFT, sensor integration, debug architecture.