Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
5 years of experience in architecture/microarchitecture/modeling/performance/design in one or more of these areas: IOMMUs, Caches, Coherent interconnects, Memory Systems.
Experience in Advanced RISC Machine (ARM) architecture, ARM TrustZone Security Architecture, ARM memory model and Android/Linux Virtual Memory Management.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience working with simulation tools (System C/TLM, C++, Python).
Experience in SoC system pre-silicon or post-silicon performance analysis and tuning.
Knowledge with designing/implementing/validating in two or more of these areas: IOMMUs, Caches, Coherent interconnects, Memory Systems.
Knowledge of Hardware Description Language languages such as System Verilog, Verilog.