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Job Description:
DFT and STA Design Automation Senior Manager
We provide first time correct on schedule ASIC designs by relying on proven flows and methodology. As a Design Automation Senior Manager, you will lead a highly skilled team of engineers that own and provide the STA and DFT flows that enable our ASIC design teams.
Responsibilities may include:
Integratingcommercial EDA toolsand configurations into proprietary design platform
Develop and supportproprietary EDA toolsfor high performance IP and ASIC circuit design
Required:
Bachelor's in Electrical Engineering, Computer Engineering, or Computer Science. Minimum of 15 years of overall experience of which a minimum of 5 years is in management.
Legal authorization to work in the U.S.
Good communication & teamwork skills
Strong leadership skills
Desired:
Master’s Degree
Management or technical leadership experience (5-10 years)
Electrical Engineering background
CMOS digital and/or analog circuit basics
Working knowledge of data structures and their applications in programming
Proficiency in:
C language coding
Shell scripting language (sh, bash, etc.)
Python or ruby
Unix/Linux development environment
CAD/EDA familiarityor experience (in one or more areas)
Design For Test concepts, tools
Custom circuit or ASIC design tools and flows
Static timing analysis concepts, tools
Industry circuit data formats (e.g. SPICE, LEF/DEF, Verilog, OpenAccess, GDS/OASIS)
Compensation and Benefits
The annual base salary range for this position is $146,000 - $234,000.
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
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