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Qualcomm PD Flow Methodology Engineer 
India, Karnataka, Bengaluru 
902827138

23.06.2024

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

  • Technology and PD Flow Methodology enablement.

  • Work with Physical design engineers to rollout robust, identify areas for flow improvement methodologies.

(area/power/performance/convergence), develop plans and

deploy/support them

  • Support physical design flows using Innovus/fc/icc2 tools

  • Provide tool support and issue debugging services to physical design

team engineers across various sites

  • Develop and maintain 3rd party tool integration and productivity

enhancement routines

  • Understand advance tech PNR and STA concepts and methodologies and work closely with EDA vendors to deploy solutions.

  • Good to strong TCL, Perl programming skills

  • Knowledge of one of Encounter/Innovus or Icc2 or Olympus tool (or

other equivalent PNR tool) is mandatory

  • Basic understanding of Timing/Formal verification/Physical

verification/extraction are desired

  • Ability to ramp-up in new areas, be a good team player and excellent

communication skills desired

3-7 years of experience with the Place-and-route and timing closer and power analysis environment is required

Handling support tools like Encounter/Innovus/edi/fc/Icc2 (or other equivalent PNR tool). One or more of the above is mandatory*

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.