Intel Formal Engineer 

Israel, Haifa District, Haifa 

901348904

As a Formal Verification Engineer, you will be tasked with the comprehensive formal verification of multiple intricate design blocks and IPs. Your responsibilities will encompass:� Developing and executing formal verification test plans using advanced formal methodologies.� Creating common abstract formal units.� Collaborating with cross-functional teams, including Design Verification (DV), Architecture (Arch), Design.� Proving design properties, identifying design bugs, and working closely with design teams to improve microarchitecture.� Addressing and solving complex problems.� Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or Mathematics.� Experience with formal verification tools such as JasperGold, VC Formal, or IBM SixthSense.� Expertise in hardware description languages, including Verilog, SystemVerilog, and SVA.� Knowledge and experience with standard protocols such as AMBA AXI, ACE, and APB.� Familiarity with formal verification methodologies and techniques.� Knowledge in scripting languages such as Python or TCL.� Strong analytical skills for solving complex problems.We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits