Nvidia Senior Physical Design Verification Layout Engineer 

Israel, North District 

897766689

What you'll be doing:

• Responsible for chip floorplan and pins placement

• Running, debugging and approve Physical verification flows across multiple projects

• Perform physical layout planning and optimization

What we need to see:

• B.SC./ M.SC. in Electrical Engineering

• At least 5+ years of hands-on layout design experience

• Strong background of Physical Design Verification methodology LVS/DRC

• Knowledge in physical design flows and methodologies (PNR, STA, physical verification)

• Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc..)

• Great teammate