Nvidia Senior CAD Engineer 

India, Karnataka, Bengaluru 

881168379

What You’ll Be Doing:

• Develop and maintain robust equivalence checking flows (FEC/FEV) for different stages of the VLSI design cycle, including RTL-to-RTL, RTL-to-Gate, and Gate-to-Gates equivalence checking.

• Develop and enhance the RTL Physical-Synthesis work flows, both at full-chip and block-level.

• Partner with implementation teams, on both synthesis and P&R side, to understand their requirements and pain-points if any, and enhance the methodology to cover for the same.

• Develop and deploy various methodologies based on technology updates, design requirements, and tool-feature/version updates and bug-fixes.

• Finetune the recipes for designs with aggressive PPA targets while ensuring logical-equivalence is maintained.

• Optimize flows and methodologies for performance, capacity, and debug capabilities, ensuring efficient and effective verification of sophisticated VLSI designs.

• Investigate and resolve equivalence checking issues, including setup and constraint-related problems, debug failures, and performance bottlenecks.

• Develop custom scripts using tcl/perl/python to automate the post-processing of the reports/logs to present the results in a user-friendly format.

What We Need To See:

• B.Tech/BS inVLSI/Electronics/ElectricalEngineering or Computer Science, with 5+ years of relevant ASIC design experience and/or CAD experience, with a focus on Logic Equivalence Checking and RTL-Synthesis.

• Be familiar with Verilog and ASIC design flow along with experience in commercial EDA tools

• Strong scripting skills in languages such as Perl, Python, and TCL.

• Excellent problem-solving, debugging, and analytical skills.

• Ability to work in a team environment and collaborate efficiently with multi-functional teams.

• Strong communication and documentation skills