Intel CPU Logic Design Engineer 

Mexico, Jalisco, Guadalajara 

872656832

The role responsibilities include but are not limited to:

• perform logic design Register Transfer Level (RTL) coding and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs.
• perform first level verification of its own design units.
• apply various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
• support SoC customers to ensure high-quality integration of the CPU block.
• document micro architectural specs (MAS) of the CPU features being designed.
• review the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• influence test plan and test strategy for the SoC components in tight collaboration with the Verification counterpart.

Qualifications

Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

6+ months of experience working in the following areas:

• digital design, ASIC design flow and computer architecture.
• programming/scripting languages like C/C++, Perl, Ruby, Python, and Unix (Linux).
• hardware description languages (such as VHDL, Verilog, System Verilog).
• Pre-Silicon Logic Design, including expertise in: System Verilog for Design, Logical Synthesis, STA, Timing closure, Linting, Design for Low Power techniques and Verification skills such as: test development, execution, debug.

Preferred qualificationsare in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• Projects or internships in CPU or ASIC verification and functional modeling.
• Past industry experience or in-depth academia research for Masters/PhD in IP logic design.
• Experience with scripting languages like Python Perl
• Familiarity with x86 or advanced CPU Datapath components Design
• Relevant courses: Computer Architecture, Digital Design, Verification Logic Design, Programming Languages and Data Structures.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits