Qualcomm Turing Design Verification - Sr Lead Engineer 

India, Karnataka, Bengaluru 

851074484

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

Job Description

Being a part of the DV Team, you will work on Functional , Formal Power aware and Gate level simulation

Get to work on the latest and cutting-edge tech nodes

Required to work on IP / Subsystem level verification and own various DV tasks from Test plan creation, coverage model development, test case writing and coverage closure.

• Should be proficient in System-Verilog and scripting language like Shell, Perl . Must have RTL/gate level simulation debug experience.

• Should have a working knowledge of bus protocols like AHB/AXI .

• Candidates should have 5-8 years experience.

• Good in SV, UVM, Assertions, GLS

• Solid knowledge of C and Scipting language like python

• Working knowledge of bus protocol like AHB/AXI

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.