Qualcomm CPU SRAM Design Engineer 

India, Karnataka, Bengaluru 

841128052

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

CPU SRAM Design Engineer

As a CPU SRAM Design Engineer, you will design, improve, and analyze digital circuits for memories. The role involves full ownership of custom SRAM and RF designs from schematic capture to analysis and model generation.

Minimum qualifications

• BA/BS degree in Electrical Engineering with 5+ years of practical experience

• Experience with designing SRAM circuits

• Experience in industry standard custom design tools and flows

• Experience with circuit simulation and monte carlo analysis.

• Experience with static timing analysis.

Preferred qualifications

• MS degree in Electrical Engineering; 7+ years of practical experience

• Strong knowledge of SRAM and Register File techniques with advanced custom circuit implementations

• Strong knowledge of high-performance and low-power design features and techniques

• Strong knowledge of semiconductor device fundamentals

• Familiar with variation-aware simulation in FinFet and Nanosheet technology nodes

• Experience with custom memory layout designs

• Experience with all memory analysis steps including design entry, functional verification, layout guidance, simulation, timing, power and electrical characterization.

• Good understanding of physical implementation impact on circuit performance

• Proficiency with the following tools: NanoTime, Ansys EMIR analysis, ESP-CV, Liberate power analysis

Roles and Responsibilities

• Develop custom digital circuits for high-speed and low-power SRAM designs

• Schematic capture

• Layout planning and supervision

• Functional verification

• Simulation and margin verification

• Timing characterization

• Performing analysis steps necessary to generate all deliverable collateral models

• Interacting with CAD team to ensure proper and efficient model generation

• Interacting with Physical Design team resolve memory PPA challenges

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.