Nvidia Senior Mask Layout Design Engineer 

Taiwan, Taiwan Province, Hsinchu 

841049181

What you'll be doing:

• Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence tools

• You'll work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.

• Job duties will include floor planning, custom layout and verifying against design rules and schematics.

What we need to see:

• Hold a BSEE or equivalent experience

• Minimum of 5+ years of relevant mask design / layout experience

• Deep understanding of analog circuit layout concepts in submicron CMOS technologies

• Proven experience with Cadence custom circuit design tools - particularly virtuoso / Experience running and debugging DRC and LVS with verification tools such as Dracula, Hercules, Calibre, Primeyield

• Ability to work effectively in a team, good interpersonal skills and positive energy.

• Proficiency in scripting languages like perl, python, skill etc. / Knowledge of DRC and LVS checking flows, ability to customize DRC and LVS decks