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Google ASIC Physical Design Implementation Engineer 
India, Karnataka, Bengaluru 
813328471

30.04.2024
Minimum qualifications:
  • Bachelor's degree in Electrical or Electronics Engineering, or equivalent practical experience.
  • Experience in high performance synthesis, PnR (Place and route), and sign-off optimizations.
  • Experience in sign-off convergence, including Static timing analysis (STA), electrical checks, and physical verification.

Preferred qualifications:
  • Knowledge of Verilog/SystemVerilog.
  • Understanding of circuit design, device physics, and deep submicron technology.
  • Excellent scripting skills with Python, Tcl, or Perl.