KLA Electrical Design Engineer FPGA PCB E 

United States, California, Milpitas 

813168534

Major responsibilities include:

• Participate in all phases of FPGA design flow - from concept to wafer inspection tool integration.
• Able to derive FPGA design requirements from system requirements.
• Responsible for RTL design and verification, as well as hardware bring-up.
• Implement logic/control blocks, including custom filters, DSP/image processing blocks, a high-speed image data path, and a processor and memory interface to support real-time processing.
• Optimize FPGA designs for the area, speed, and power to meet system requirements; analyze architectural trade-offs and validate for system sample rate and latency.
• Verify DSP/image processing blocks against Python/MATLAB models and collaborate with systems engineers.
• Run implementation tools, such as Xilinx Vivado and Intel Quartus; perform timing closure for your designs.
• Bring up and validate FPGA design in the lab and apply various lab equipment.
• Collaborate with software engineers to integrate the design into the wafer Inspection tools.
• Contribute to all phases of hardware development, including creating design documents, reviewing schematics, bringing up new hardware, anddefining/overseeing/performingunit and system tests.
• Validate FPGA design for manufacturing release.

Qualifications/EducationDesired:

• Experience designing DSP and/or image processing datapath.
• Experience in working with FPGAs.
• Some experience designing hardware (schematic entry, layout, etc.) is a plus.
• Strong programming and scripting skills: MATLAB, Python, C/C++, Perl, Tcl.
• Understanding of clock domain crossing (CDC) techniques
• Experience in FPGAs, evaluation boards, and knowledge of FPGA design flow.
• Understanding industry-standard interfaces, protocols, and architectures: PCIe, Ethernet, DDR, etc.
• Experience in developing automated, self-checking test benches and/or UVM.
• Experience in EDA tools such as simulators (e.g., Questa), and FPGA tools (e.g., Vivado, Quartus)
• Knowledge of timing closure techniques for high-speed design.
• Stronginterpersonal/written/verbalcommunication skills and experience with multi-functional collaboration.
• Strong partnership skills combined with the ability to work autonomously as an individual contributor.

Minimum Qualifications

• BS or MS in EE required.
• 5+ years of experience designing and verifying high-speed digital designs on FPGAs for deployed products.