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Google Layout Design Engineer Silicon India, Karnataka, Bengaluru 773423505
05.02.2025
Minimum qualifications:
Preferred qualifications:
- Bachelor’s degree in VLSI, Computer Engineering, or equivalent practical experience.
- 5 years of experience designing and drawing layout of high-speed/low power memories.
- 5 years of experience with layout verification activities like DRC, LVS, Latch-Up, or EMIR and Density Checks.
- Experience with developing memory array layout (e.g., row decoders, write drivers, assist circuits, sense amplifiers, memory control circuit) in 3nm (or equivalent) technology nodes.
Preferred qualifications:
- Master's degree in VLSI, Computer Engineering, or a related field.
- Experience drawing layout for sense amplifiers, decoders, assist circuits, latches, flip-flops, isolation cells, power switches, and level shifters.
- Experience with placement, track planning and integration of various blocks within SRAM memories.
- Experience with Virtuoso XL and Extraction tools such as Star-RC/QFS.
- Understanding of layout design rules, layout dependent effects and DFM in FinFET technology nodes.
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