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Apple Formal Verification Engineer 
United Kingdom, England, St Albans 
766449103

23.11.2024
Minimum Qualifications
  • Advanced knowledge of SoC/CPU/GPU designs, VLSI, and digital logic design and verification techniques
  • Developed formal property proofs on industrial strength designs and architectures
  • Deep understanding of pipeline architectures, memory/DMA controllers, out-of-order and speculative instruction execution hardware, bus interconnects, and cache coherence mechanisms
  • Confirmed understanding of formal verification technologies/abstraction techniques
  • Experience in using EDA formal tools and tool development experience is a plus
  • Proficiency in any scripting language with excellent debugging skills
  • Extraordinary teammate with excellent interpersonal skills
  • Passionate about developing world-class/innovative formal verification solutions
Preferred Qualifications
  • Knowledge and experience in interpreting hardware specifications and using
  • Temporal logic assertion-based languages such as SVA or PSL
  • BS / MS / Ph.D in EE or CS is required.