You will be part of the design and implementation of high speed interface circuits
Have the chance to create projects including high speed transceivers and high frequency PLLs
Become involved in the design, simulation, and verification of mixed-signal circuits
Lead mask designers, provide mentorship for floorplan and layout design
Provide support to the lab characterization of silicon, and pursue the challenges of circuit design in deep submicron CMOS
You will take designs through implementation and productizing; Collaborate with multi-functional teams
What we need to see:
BS or MS in Electrical Engineering, PhD preferred. (or equivalent experience)
5+ years of design experience in CMOS analog / mixed-signal circuit
Working knowledge of Cadence custom design tools, circuit simulator, timing analysis tool
Someone who's an exceptional teammate with good interpersonal skills. Validated experience in leading and mentoring designers
Your extensive design experience in Data Converters, Tx, Rx, CDR, PLL for high speed IO interfaces. In-depth understanding of deep submicron CMOS process and related circuit design issues
Proven experience in silicon bring-up, debugging and use of lab instrumentation is required. Knowledge in system level timing budget, signal integrity, and power integrity is a plus
Experience in Verilog, Matlab, Nanotime is helpful