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Google RTL Design Engineer Google Cloud 
Israel, Tel Aviv District, Tel Aviv-Yafo 
754747619

Yesterday
Info Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.Note: By applying to this position you will have an opportunity to share your preferred working location from the following:.
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering or equivalent practical experience.
  • 5 years of experience with RTL development for ASIC subsystems using Verilog.
  • Experience with speed interfaces such as PCIe, InfiniBand, and their low latency, security, and reliability principles.
  • Experience with micro architecture, design, verification, logic synthesis, and timing closure.

Preferred qualifications:
  • Experience with scripting languages (e.g., Python or Perl).
  • Knowledge of arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
  • Knowledge of high performance and low power design techniques.
  • Knowledge of FPGA, emulation platforms, and SoC architecture.
  • Knowledge of assertion-based formal verification.